tronics, and computer systems company. Bull, to propose a project devoted to network-on-chip (NoC) design. The aim is to
PROJECT PROFILE
2A703: Networks on chips design driven by video and distributed applications (NEVA) EDA FOR SOC DESIGN AND DFM
Partners: ACE Bull Certess LETI / CEA LIACS / Univ. of Leiden Philips Silicomp STMicroelectronics TIMA / INPG VERIMAG / UJF Project leader: Philippe Garcin, STMicroelectronics
Circuits for electronic devices are becoming so complex that they are expected to reach a billion transistors by the end of 2008. Traditional silicon chip architectures are nearing the limit of their performance in such applications so the NEVA project was set up to introduce innovative network-on-chip designs, based on multiple processors and asynchronous circuitry. The goal is to allow designers and application engineers to cope with emerging applications resulting from multimedia/communication convergence. In the first instance, datastream applications, mainly from the video environment, will be used as drivers, with a targeted computing power around one giga operations per second per chip.
Increasing awareness of bottlenecks in
puting and high-performance computing
today's system-on-chip (SoC) designs motiv-
(HPC).
ated chipmakers Philips and STMicroelectronics, and computer systems company
Three innovative techniques
Bull, to propose a project devoted to network-on-chip (NoC) design. The aim is to
To reach its goals, NEVA aims to implement
provide designers and application engineers
and prove three innovative techniques:
Start: January 2005 End: December 2008
with an alternative approach to complex
1. Communication-centric design using a
circuit architectures capable of handling
high level approach based on system
Countries involved:
giga operations per second (GOPS) for 130,
level mock-ups. Transaction-level model-
90 and future 65 nm technology generations.
ling (TLM) is more and more accepted by
The MEDEA+ 2A703 NEVA project will be
industry. This approach will be extended
driven mainly by video system require-
while efficient protocols and fast co-veri-
ments, with complementary functions
fication methods, such as simulated and
proposed by Philips in video processing and
accelerated TLM, will be developed for
STMicroelectronics in video transmission.
NoC architectures. The benefit will be
Over the next few years, video applications
shorter time to market through acceler-
will have to handle increasing quantities of
ated simulations and reusable models at
data for high-definition TV with demand-
intermediary level.
Key project dates:
France The Netherlands
ing enhancements such as three-dimen-
2. Dynamic configurability will allow
sional display from two-dimensional data
optimisation of resources. This aspect
extraction. Approaches proven in the
will be considered at architectural and
design of video applications are expected
modelling levels. New timing tools will
to benefit other datastream applications.
be necessary to guarantee predictability.
NEVA will address inter-process communi-
Compilers have to be adapted to take
cation at chip level, using communication-
into account customised complex in-
centric design techniques. Bull will provide
structions that will reconfigure the
the required applications technique for
hardware resources accordingly. This
benchmarking in the field of multi-com-
approach will result in higher comput-
2A703: Networks on chips design driven by video and distributed applications (NEVA) ing power and suitability for demand-
form are three sectors in which European
sales. Electronic games are also very
ing real-time applications.
CAD tool suppliers and NEVA partners
demanding in terms of video-computing
3. Asynchronous architectures imple-
Certess and Silicomp will gain substantial
resources. Finally, distributed applica-
mented using the globally asynchro-
benefits — such as expertise, improved fit
tions will increase their performance and
nous locally synchronous (GALS) tech-
with industrial needs and new products.
attractiveness thanks to the different
nique. This will result in the ability
Tools will target new market segments
network levels promoted by this project.
to design circuits with lower power
the size of which is still difficult to
The current camcorder market is around
consumption. Clock distribution prob-
estimate.
€1.1 billion, and growing at 10% a year.
lems will be reduced as well as asso-
In global values, the world semiconduc-
ciated speed limitations. Yield will be
tor market is expected to reach around
increased as a result of the greater
€200 billion in 2005, and to slowly
reliability of GALS systems.
Reinforcing position
increase from this value in 2006 and
Europe has a strong scientific advance in
Achievements from the first phase of
2007. Products addressed by NEVA con-
system-level design techniques compared
MEDEA+ — including A302 ESPASS-IS,
cern data processing and fall in the cate-
with the rest of the world. Background
A502 MESA, A508 SPEAC and A511 TOOLIP
gory of application-specific standard
and synergy from NEVA partners will
— will also be exploited and are expected
products, which constitute roughly 25%
help Europe to keep and reinforce this
to provide a considerable advance.
of these amounts — i.e. around €50 billion.
strong position. New approaches devel-
Building on global success
Securing competitiveness
In the domain of multi- and high per-
Overall, this MEDEA+ project is intended
community.
formance computing, Bull is among the
to secure European competitiveness in
The NEVA project is also expected to
few European players capable of being
TV, telecommunications, multimedia,
favour the creation of new jobs in the
competitive against US and Japanese
and multi- and high performance com-
participating CAD companies. The advan-
counterparts. Although competition from
puting. NoC-based ICs will target the
tage in terms of competitiveness for
China is strengthening, Philips is in the
set-top box and camcorder markets.
the participating chip making and sys-
top three worldwide and number one in
NEVA is also addressing datastream
tem companies will be a positive influ-
Europe for consumer audio/video elec-
applications in general.
ence on employment in France and the
tronics. STMicroelectronics and Philips
The global digital TV market is set to grow
Netherlands with the potential to create
provide chips for a wide range of digital
from 58 million units in 2003 to 91 mil-
additional employment in peripheral
consumer applications such as set-top
lion in 2008, an average growth of 8 to
businesses around Europe.
boxes, DVD players, digital TVs, radios,
9% but growth will only take off from
With three university laboratories and
cameras and MP3 players. STMicroelec-
2006 as integrated digital TVs become
one public research centre participating
tronics is the world's leading supplier of
mainstream. Availability of low cost set-
in the project, a substantial impact on
MPEG video compression devices with
top boxes could change the dynamics of
education is also expected. Innovations
over 140 million chips sold.
the conversion to a digital TV service in
resulting from the project, at theoretical
The electronic design automation (EDA)
Europe. Their price level is already expect-
and methodological levels, will influence
market is currently estimated at €3.2
ed to fall from €84 in 2003 to €36 by 2007.
existing courses and give birth to new
billion and is expected to grow at a
Production of mobile cell phones is
courses. Bull intends to strengthen its
rate close to 5%. Quality evaluation of
expected to stabilise at around 520 mil-
co-operation through lectures on system
hardware blocks, computer-aided design
lion units a year from 2005. Video com-
prototyping at the ISEP engineering
(CAD) tools for protocol verification and
pression and video enhancements will
school by extending courses with the
the accelerated transaction-level plat-
hopefully contribute to revitalising their
validation of protocols.
oped in the project — such as asynchronous design — will be disseminated effectively within the European designers'
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EUREKA MEDEA+ !2365 is the industry-driven pan-European programme for advanced co-operative R&D in microelectronics to ensure Europe's technological and industrial competitiveness in this sector on a worldwide basis. MEDEA+ focuses on enabling technologies for the Information Society and aims to make Europe a leader in system innovation on silicon for the e-economy.