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PLASMA TV SERVICE MANUAL CHASSIS : PD01A

MODEL : 42PJ350

42PJ350-ZA

CAUTION BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL62881211(1001-REV00)

Printed in Korea

CONTENTS

CONTENTS ............................................................................................................................... 2 SAFETY PRECAUTIONS ...........................................................................................................3 SPECIFICATION.........................................................................................................................4 ADJUSTMENT INSTRUCTION ..................................................................................................7 TROUBLESHOOTING GUIDE .................................................................................................12 BLOCK DIAGRAM ...................................................................................................................23 EXPLODED VIEW ...................................................................................................................24 SVC. SHEET ................................................................................................................................

Copyright ©2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified.

Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet. Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.

Leakage Current Hot Check circuit

Keep wires away from high voltage or high temperature parts.

AC Volt-meter

Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.

Leakage Current Cold Check(Antenna Cold Check) With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.


-3-

To Instrument's exposed METALLIC PARTS

0.15uF

Good Earth Ground such as WATER PIPE, CONDUIT etc.

1.5 Kohm/10W


SPECIFICATIONS NOTE : Specifications and others are subject to change without notice for improvement. V

Application Range This spec is applied to the PLASMA TV used PD01A Chassis.

V

Specification Each part is tested as below without special appointment. 1) Temperature : 25±5°C (77±9°F), CST : 40±5 2) Relative Humidity: 65±10% 3) Power Voltage: Standard Input voltage (100-240V~, 50/60Hz) * Standard Voltage of each product is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5) The receiver must be operated for about 20 minutes prior to the adjustment.

V

Test Method 1) Performance : LGE TV test method followed. 2) Demanded other specification Safety : CE, IEC specification EMC : CE, IEC

V

Module Specification (1) 42” HD No

Item

Specification

1

Display Screen Device

42 inch Wide Color Display Module

2

Aspect Ratio

16:9

3

PDP Module

PDP42

Remark PDP

####,

RGB Closed(Well) Type, Glass Filter(38%) Pixel Format: 1365 horiz. By 768 ver. 4

Operating Environment

1) Temp. : 0 ~ 40deg 2) Humidity : 20 ~ 80%

5

Storage Environment

LGE SPEC.

3) Temp. : -20 ~ 60deg 4) Humidity : 10 ~ 90%

6

Input Voltage

AC100-240V~, 50/60Hz


-4-

Maker LG


V

Model General Specification

No 1

Item Market

Specification Albania, Austria, Belgium, Bosnia, Bulgaria,

Remarks 36 Country

Coratia, Czech, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Kazakhstan, Latvia, Lithuania, Luxembourg, Morocco, Netherlands, Norway, Poland, Portugal, Romania, Russia, Serbia, Slovenia, Spain, Sweden, Slovakia, Switzerland, Turkey, Ukraine, UK 2

Broadcasting system

1) PAL/SECAM BG

EU (PAL Market)

2) PAL/SECAM DK 3) PAL Ⅰ/Ⅱ 4) SECAM L/L’ 5) DVB T 6) DVB C 3

Receiving system

Analog : Upper Heterodyne Digital : COFDM, QAM

4

Scart Jack (2EA)

PAL, SECAM

Scart 1 Jack is Full scart and support RF-OUT(Analoge) Scart 2 jack is Half scart and support MNT-OUT.

5

Video Input (1EA)

PAL, SECAM, NTSC

Side AV except PJ20, PK20

6

Component Input (1EA)

Y/Cb/Cr, Y/ Pb/Pr

rear

7

RGB Input

RGB-PC

Analog (D-Sub 15Pin) except PJ20, PK20

8

HDMI Input (4EA)

HDMI-PC

HDMI1/DVI, HDMI2, HDMI3

HDMI-DTV

1ea : PJ20 2ea : PK30, PK20, PJ60, PJ50, PJ30 3ea : PK50, PK70

9

Audio Input (3 EA)

RGB/DVI Audio, Component, AV

L/R Input

10

SPDIF Out(1 EA)

SPDIF Out

11

USB

For SVC, S/W Download, X-Studio, DivX

PJ30 doesn’t support Divx

12

Bluetooth

Bluetooth Phone(JPEG, MP3),

Only 50/60PK550

Bluetooth Headset(mono, stereo)

Profile : A2DP, BIP, FTP, GAVDP, HSP, OPP

PK20, PJ20 only for SVC


-5-


V

Chroma & Brightness (Optical)

(1) (With 38% Glass Filter) 42T1 module No

Item

Min

1.

White peak brightness

315

Typ

Max

Unit

-

cd/m2

Remark (*) Peak Brightness Mode -1/100 white Window pattern (Typically 1% Window size) -100IRE (255Gray) -Picture: Vivid (Medium) -Input: HDMI-PC(1920*1080 60Hz) *Peak Brightness Condition may Slightly different between sets.

2.

White average brightness

148

161

46

50

-25/100 white Window pattern cd/m2

- 100% Window White Pattern - 100IRE(255Gray) - Picture: Vivid(Medium )

3.

Brightness uniformity

-10

0

+10

%

- 85IRE(216Gray) 100% Window White Pattern - Picture: Vivid(Medium)

4.

Color

White

X

0.270

0.285

0.300

Y

0.283

0.293

0.303

X

0.635

0.640

-

Y

0.318

0.330

0.345

Green

X

0.242

0.300

0.305

Y

0.595

0.600

-

Blue

X

-

0.150

0.158

Coordinate Red

-

0.065

0.075

5.

Color coordinate uniformity

Y

-0.01

Average

+0.01

6.

Contrast ratio at dark room

100k: 1

1,000k: 1

- White : 85IRE(216Gray) 100% Window White Pattern - R/G/B : 100IRE(255Gray) 100% Window White Pattern - Picture: Vivid(Medium ) - 100% Window

- 85IRE 100% Window White Pattern - Picture: Vivid(Medium) -1/100 white window pattern(Peak mode) -100IRE(255Gray) -Picture: Vivid(Medium) -Input: HDMI-PC (1920*1080 60Hz)

7.

Color

Cool

Temperature Medium Warm

X

0.261

0.276

0.291

- 85IRE 100% Window White Pattern

Y

0.268

0.283

0.298

Warm : ColorGamut => WIDE

X

0.270

0.285

0.300

Cool : Color temperature C30

Y

0.278

0.293

0.308

Meduum : Color temperature 0 Warm : Color temperature W30

X

0.298

0.313

0.328

Y

0.314

0.329

0.344


-6-


ADJUSTMENT INSTRUCTION [Caution] - Use ‘power on’ button of a service R/C to power on TV set. - Do not connect any external input cable if there is no any specifics.

1. Application This spec. sheet is applied to all of the PD01A chassis.

2. Specification [Caution: The module keeping condition] 1. The module keeping condition: The normal temperature condition(more than 15°C) --> Immediately the line supply. 2. The module keeping condition: 0°C --> The module must be kept for more than 2 hours at the normal temperature. 3. The module keeping condition: -20°C --> The module must be kept for more than 3 hours at the normal temperature. 4. The case of Gu-mi factory at the winter season. --> The module must be kept for more than 5 minutes at the heating zone(40°C~45°C). (1) The adjustment is according to the order which is designated and which must be followed, according to the plan which can be changed only on agreeing. (2) If there is no specific designation, the adjustment must be performed in the circumstance of 25±5°C of temperature and 65±10% of relative humidity. (3) The input voltage of the set must keep 100~240V, 50/60Hz. (4) Input signal Unit: Product Specification Standard. (5) The set must be operated for about 5 minutes prior to the adjustment.

3. Update S/W using Auto Download through the USB Caution: S/W version of USB file (xxx.epk) must be bigger than one which is downloaded previously. (1) Insert the USB stick to the USB socket (2) A downloaded file in USB stick will be detected automatically. (3) If S/W version of USB file (xxx.epk) is bigger than one which is downloaded previously, the message, “Copying files from memory”, will appear. (4) If an update procedure was completed, TV set will be turned off and on automatically. (5) If TV set is turned on, check an updated version. * If a downloaded version is more bigger than one of which TV set had, TV set can lost channel data. In this case, you have to scan channels again.

4. After Downloading S/W, Adjust TOOL OPTION

After turning on RGB Full Window pattern in HEAT-RUN Mode, the receiver must be operated. O Enter into HEAT-RUN MODE 1) Press the ‘POWER ON’ button on R/C for adjustment. 2) Press the ‘ADJ’ button on R/C and enter EZ ADJUST Select “7. Test Pattern” by using D/E(CH +/-) and press ENTER(V) Select “White” by using F / G (VOL +/-) and press ENTER(V) O

- Set heat run should be activated without a signal generator. - Single color patterns (RED / BLUE / GREEN) of HEAT RUN MODE are used to check a plasma panel. - Caution: If you turn on a still screen more than 20 minutes (Especially digital pattern, cross hatch pattern), an after image may be made in the black level part of the screen.


-7-

(1) Push “IN-START” button on a service R/C. (2) Select “Tool Option 1” and Push “OK” button. (3) Put the number of a below table in order of a suffix of the “Tool Option(X)”. (Each model has a different number.) Model

Tool Option1 Tool Option2 Tool Option3 Tool Option4

42PJ250-ZC

25088

546

2252

3360

42PJ350-ZA

25024

1574

35020

3360

42PJ550-ZD

24960

1574

51404

3360

42PJ650-ZA

24896

1574

51408

3360

50PJ250-ZC

37376

546

2252

3360

50PJ350-ZA

37312

1574

35020

3360

50PJ550-ZD

37248

1574

51404

3360

50PJ650-ZA

37184

1574

51408

3360

50PK250-ZA

37120

1570

2252

3360

50PK350-ZB

37056

1574

51404

3360

50PK550-ZE

36992

2598

55500

11552

50PK750-ZA

36928

2598

51408

11552

60PK250-ZA

49408

1570

2252

3360

60PK550-ZE

49280

2598

55500

11552


5. ADC Calibration Procedure

6. EDID Download Procedure

(1) Input the component (480i/Horizontal Color Bar) signal to a TV set. 1) Input Signal Timing : Component 480i (Other external connection is unnecessary except the component before executing ADC calibration.) 2) Input Signal Pattern

(1) Push “ADJ” button on a service R/C. (2) Enter EDID auto download mode by selecting ‘8. EDID D/L’.

@ MODEL: 209 in Pattern Generator(480i Mode) @ PATTERN : 65 in Pattern Generator(MSPG-925 SERISE) (2) Push “ADJ” button on a service R/C. (3) Enter internal ADC mode by selecting ‘5. ADC Calibration’. (4) If you select ‘Start’ on a dialog box of the screen, ADC calibration will be begun.

(3) If you select ‘Start’ on a dialog box of the screen, EDID download will be begun automatically. (4) Press ‘EXIT’ button on a service R/C. (5) EDID Data 1) HDMI (HD Models, 256 bytes)

Caution: Don’t connect any external input cable except the component input(480i/Horizontal_Color_Bar) to adjust ADC calibration 2) RGB (HD Models, 128 bytes) O

Auto ADC Calibration Map(RS-232C) NO

Item

Enter Adjust Adjust MODE ‘Mode In’

ADC Adjust

ADC Adjust

CMD1 CMD2 Data0 A

A

0

0

When transfer the ‘Made In’, Carry the command.

A

D

1

0

Automatically adjustment (The use of a internal pattern) O

# Adjust Sequence - aa 00 00 [Enter Adjust Mode] - xb 00 40 [Component1 Input (480i)] - ad 00 10 [Adjust 480i Comp1] - xb 00 60 [RGB Input (1024*768)] - ad 00 10 [Adjust 1024*768 RGB] - aa 00 90 End Adjust mode


-8-

EDID Data detailing (ⓐ, ⓑ, ⓒ, ⓓ, ⓔ, ⓕ)


8. POWER Supply Unit PCB Ass’y Va/Vs Voltage Adjustment

ⓐ Product ID MODEL

EDID MODEL

PRODUCT_ID

FUNCTION

ALL Model

LG DTV

0001(0x01, 0x00)

Analog

ALL Model

LG DTV

0001(0x01, 0x00)

Digital

Caution: Both Vs and Va voltage adjustment are necessary.

8-1. Model name: ⓑ Serial No => Controlled on production line

42PJ250-ZC, 42PJ350-ZA, 42PJ550-ZD, 42PJ650-ZA 50PJ250-ZC, 50PJ350-ZA, 50PJ550-ZD, 50PJ650-ZA 50PK250-ZA, 50PK350-ZB, 50PK550-ZE, 50PK750-ZA 60PK250-ZA, 60PK550-ZE

ⓒ Month, Year => Controlled on production line:

8-2. Va/Vs Adjustment Procedure (1) Connect positive(+) terminal of DMM to Vs/Va pin, connect negative(-) terminal to GND. (2) Turning ‘Vs/Va Adjust’ and adjust Vs/Va voltages to a value which is written on a right/top label of a module. (deviation ; ±0.5V)

ⓓ Model Name ⓔ Checksum => Changeable by total EDID data FHD

HD

HDMI1

0xE2

0xB4

HDMI2

0xE2

HDMI3

0xE2

HDMI4

-

RGB

0xAF

0xB4

0xA4

0xAF

0xA4

0x94

0xAF

0x94

-

-

0x62

0x2F

ⓕ HDMI Port No. O

Auto EDID Download Map(RS-232C) NO

Item

CMD1 CMD2 Data0

Enter download MODE

Download ‘Mode In’

A

A

0

0

When transfer the ‘Made In’, Carry the command.

EDID data and Model option Download download

A

E

00 10

Automatically download (The use of a internal Data)

[Caution] - Each Power Supply Unit PCB assembly must be checked by check JIG set. (Because power PCB Ass’y damages to PDP Module, especially be careful) - Set up “RF mode(noise)” before a voltage adjustment. - Test equipment: DMM 1EA

9. White Balance Adjustment 7. PCMCIA CARD Check You must adjust DTV 29 Channel and insert PCMCIA CARD to socket. - If PCMCIA CARD works normally, video signals will appear on screen. But it works abnormally, “No CA module” will appear on screen. [ Caution: Set up “RF mode” before launching products.


-9-

Caution: Press the POWER ON KEY on R/C before W/B adjustment. O

Test Equipment Color Analyzer (CS-1000, CA-100+(CH.10), CA-210(CH.10))

O

Please adjust CA-100+ / CA-210 by CS-1000 before measuring You should use Channel 10 which is Matrix compensated (White, Red, Green, Blue revised) by CS-1000 and adjust in accordance with White balance adjustment coordinate.


(2) Start White-Balance adjustment, then the full white window pattern will appear on the screen. (3) Adjust in the place where the influx of light like floodlight around is blocked. (illumination is less than 10ux). (4) Measure and adjust after sticking the Color Analyzer (CA100+, CA210 ) to the side of the module.

9-1. Color Temperature Standards According to CSM and Module(TBD) CSM

PLASMA

Cool

11000K

Medium

9300K

Warm

6500K O

9-2. Change Target Luminance and Range of the Auto Adjustment W/B Equipment - 42PJ250-ZC(42T1), 42PJ350-ZA(42T1), 42PJ550-ZD(42T1), 42PJ650-ZA(42T1), - 50PJ250-ZC(50T1), 50PJ350-ZA(50T1), 50PJ550-ZD(50T1), 50PJ650-ZA(50T1) - 50PK250-ZA(50R1), 50PK350-ZB(50R1), 50PK550-ZE(50R1), 50PK750-ZA(50R1) - 60PK250-ZA(60R1), 60PK550-ZE(60R1) Target luminance

50

Range

20

Auto W/B Adjustment Map(RS-232C) RS-232C COMMAND [ CMD ID DATA ] Wb 00 00 White Balance Start Wb 00 FF White Balance End RS-232C COMMAND [CMD ID DATA] Cool

Warm

Cool

Med

MA X Warm

R Gain

jg

Ja

jd

00

192

192

192

G Gain

jh

Jb

je

00

192

192

192

255

B Gain

ji

Jc

jf

00

192

192

192

255

50H3 60H3

9-3. White Balance Adjustment Coordinate and Color Temperature

Med

CENTER (DEFAULT)

Min

255

R Cut

64

64

64

128

G Cut

64

64

64

128

B C ut

64

64

64

128

9-5. Manual W/B Adjustment (1) Execute the zero calibration of CA-100+ / CA-210. (2) Press the ‘ADJ’ button on a service R/C and enter EZ ASJUST by selecting ‘6. White Balance’. (3) Then, 216 gray pattern will appear on the screen. (4) Change the R/G/B-Gain as passing in 3 color coordinates and temperatures, COOL, MEDIUM and WARM. < Temperature: COOL > - R-Cut / G-Cut / B-Cut is set to 64 - Control R-Gain and G-Gain. - Each gain is limited to 192 < Temperature: MEDIUM > - R-Cut / G-Cut / B-Cut is set to 64 - Control R-Gain and G-Gain. - Each gain is limited to 192 [ PC (for communication through RS-232C) ? UART Baud rate : 115200 bps

9-4. Automatic W/B Adjustment (1) Internal PATTERN should be used when W/B is adjusted. Connect to auto controller like below.


- 10 -

< Temperature: WARM > - R-Cut / G-Cut / B-Cut is set to 64 - Control G-Gain and B-Gain. - Each gain is limited to 192 (5) Press ‘EXIT’ button on a service R/C


Module Heat-Run Condition for W/B 1. The adjustment must be performed in the circumstance of 25±5°C of temperature and 65±10% of relative humidity if there is no any specifics. 2. Before an W/B adjustment, the module which will be used should be placed in the circumstance of 15°C~25°C for above 2 hours. 3. If a module was placed in the circumstance of below 15°C, it should be placed in the circumstance of 15°C~25°C for above 2 hours or be run for above 5 minutes in an aging environment of 60°C. 4. Before an W/B adjustment, TV set should be run for 5 minutes at least.

10-3. Command Set

[Description] FOS Default write : write Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0, Phase Data write : Model Name and Serial Number write in EEPROM,.

11. CI+ Key Download 10. Serial Number Download

11-1. Download Procedure

10-1. Download Procedure

1. Press "Power on" button of a service R/C.(Baud rate : 115200 bps) 2. Connect RS232-C Signal Cable. 3. Write CI+ Key through RS-232-C. 4. Check whether the key was downloaded or not at ‘In Start’ menu. (Refer to below)

(1) Press “Power on” button of a service R/C.(Baud rate : 115200 bps) (2) Connect RS232-C Signal Cable. (3) Write Serial number through RS-232C. (4) Check the serial number at the Diagnostics of ‘SETUP’ menu. (Refer to below).

12. Check Information (Serial No. & Model name) Caution : Don’t download HDMI/RGB EEPROM to write a model name. Model name dois unnecessary because this model use ‘Tool Option’ to call a model name.

(1) Push the menu button in DTV mode. (2) Select the SETUP -> Diagnostics -> To set (3) Check the Serial Number

10-2. Signal TABLE

CMD LENGTH ADH ADL Data CS Delay

: A0h : 85~94h (1~16 bytes) : EEPROM Sub Address high (00~1F) : EEPROM Sub Address low (00~FF) : Write data : CMD + LENGTH + ADH + ADL + Data_1 + ... + Data_n : 20ms


- 11 -


TROUBLESHOOTING GUIDE


- 12 -



- 13 -



- 14 -



- 15 -



- 16 -



- 17 -



- 18 -



- 19 -



- 20 -



- 21 -



- 22 -


BLOCK DIAGRAM


- 23 -


EXPLODED VIEW IMPORTANT SAFETY NOTICE

A12

120

A2

570

300

LV1

303

A10

301

305

304

202

A9

205

302

203

201

240

580

501

590

200

204

207

206

520

910

602

604

900

601

400

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.


- 24 -


+3.3V_ST

R /PF_OE E

NC_8 VDD_1 VSS_1

READY

+3.3V

0.1uF

C103

NC_7 READY

R112

1K

/PF_CE0

NC_9

R105 1K

NC_10

AL PF_ALE W /PF_WE WP R1239 1K

44

6

43

7

42

8

41

9

40

10

39

11

38

12

37

13

36

14

35

NC_11 NC_12

32

18

31

19

30

20

29

NC_14 NC_15

AR102 I/O7

22

27

23

26

24

PCM_A[7]

I/O6

PCM_A[6]

I/O5

PCM_A[5]

I/O4

2

5

4 3

C101 0.1uF

R115 62K

PCM_A[0-14]

PCM_A[4]

22

NC_25 NC_24

C105 10uF 6.3V

NC_23

PCM_D[1]

AA15

PCM_D[2]

AA16

PCM_D[3]

AC6

PCM_D[4]

Y10

PCM_D[5]

Y11

PCM_D[6]

Y12

PCM_D[7]

Y13 AB16

PCM_A[1]

AC15

PCM_A[2]

AC14

PCM_A[3]

AB14

PCM_A[4]

AC12

PCM_A[5]

AB8

PCM_A[6]

AC13

PCM_A[7] VDD_2

AA9

PCM_A[8]

AB5

VSS_2

PCM_A[9]

C106

0.1uF

AA4

PCM_A[11]

Y4

NC_21

PCM_A[12]

AB9

PCM_A[13]

AA7

PCM_A[14]

AD6

AR103 I/O3

PCM_A[3]

I/O2

PCM_A[2]

I/O1

PCM_A[1]

I/O0

AB18 Y5

/PCM_OE /PCM_REG

PCM_A[0]

AB15 AA10

/PCM_WAIT

AC8

/PCM_IRQA

NC_18

AC7

/PCM_WE /PCM_IOWR

NC_17

AR171

AA5 W4

/PCM_IORD

T4

/PCM_CE

NC_16

AE6

/PF_CE0 /PF_CE1

AF6

/PF_OE

AA12 22

AR101

AA11 AC9 Y14

PF_WP

AB11

+3.3V

/F_RB

6

4

5

SCLK

E1

GND

8

2

7

3

6

C100 0.1uF

WP

SPI_CK E2

Flash_WP_1

1

SI

1K

1K

R102

R101

R164 R165

SPI_DI

VSS

4

5

SCL

C117 100pFR140 50V R141 R1297 100 R1296

DBG_TX 3.3K

3

HOLD#

PCMD4/CI_D4

SPI_DI

PCMD5/CI_D5

SPI_DO

PCMD6/CI_D6

/SPI_CS

AE11

33

R1224

AF12

33

R1230

SPI_DO

AE12

33

R1225

SPI_CS

AD11

33

R1226

SPI_CK

SPI_CK

SPI_DI

PCM_A0/CI_A0 PCM_A1/CI_A1 PCM_A2/CI_A2 PCM_A3/CI_A3

B5

PCM_A4/CI_A4

USB_DP_1

PCM_A5/CI_A5

USB_DM_1

PCM_A6/CI_A6

USB_DM_2

PCM_A7/CI_A7

USB_DP_2

BT_DP

A5

BT_DM

AC10

USB_DM

AB10

PCM_A9/CI_A9 PCM_A10/CI_A10 PCM_A11/CI_A11 PCM_A12/CI_A12

R131

100

PCM_A13/CI_A13

R130

100

E5 PCM_RST/CI_RST

GPIO_PM0/GPIO134

PCM_CD/CI_CD

GPIO_PM1/GPIO135

/PCM_OE

GPIO_PM2/GPIO136

PCM_REG/CI_CLK

GPIO_PM3/GPIO137

PCM_WAIT/CI_WACK

GPIO_PM4/GPIO138

/PCM_IRQA

GPIO_PM5/INT1/GPIO139

/PCM_WE

GPIO_PM6/INT2/GPIO140

PCM_IOWR/CI_WR

GPIO130/LCK

/PCM_CE

GPIO132/LHSYNC/SPI_WPn

/PF_CE0

GPIO60/PCM2_RESET/RX1

/PF_CE1

GPIO62/PCM2_CD_N/TX1

DBG_TX +5V_ST

D11

22

AB21

22

AC21

22

J1

22

J2 W5 V5

R1294

F5

R182

G5

R185 100

H5

10K

G6

PF_AD15 LVSYNC/GPIO133 UART2_TX/SCKM

GPIO79/LVSYNC2/TX1

UART2_RX/SDAM

UART2_RX/GPIO84

DDCR_DA

UART2_TX/GPIO85

DDCR_CK

UART1_RX/GPIO86 UART1_TX/GPIO87

DDCA_CLK DDCA_DA

AF11

ISP_TXD BT_ON/OFF SC1_VIDEO_MUTE

100

R159

AA18

R1235

AA17

R1236 22 +3.3V

GPIO42/PCM2_CE_N

TS0_D0 TS0_D2 TS0_D3 TS0_D4

SDA

EEPROM_SDA

TS0_D5

TS0_VLD

Flash_WP_1

22

TS1_D0

G R199

EEPROM_SDA R1258

22

C114 0.1uF

PWM0

1K READY

R1200

R1201

1K

R1263

47K

R1298 10K +3.3V

C

1K

2SC3052 Q103

R1265 B 4.7K

TS1_VLD

PWM1

TS1_CLK

PWM2

R1242 R106

F4 E4 C4

ET_TXD0

SAR0

ET_TX_CLK

SAR1

ET_RXD0

SAR2

ET_RXD1

ET_TXD1

SAR3 IRIN

BT_ON/OFF

SCL1

R1237 AC18 R1286 C6 R1238

+3.3V

22 0

SUB_SCL 5V_HDMI_2

22

SUB_SDA

F9 F10 A6

100

B6

100

AF5

USB_OCD R1277

MOD_ROM_RX

R1276

AA8

C108 C107 10pF 10pF 50V 50V READY READY CI_TS_DATA[0]

Y8

CI_TS_DATA[1]

Y9

CI_TS_DATA[2]

AB7

CI_TS_DATA[3]

AA6

CI_TS_DATA[4]

AB6

CI_TS_DATA[5]

U4

CI_TS_DATA[6]

AC5

CI_TS_DATA[7]

AF10

MOD_ROM_TX PCM_5V_CTL CI_TS_DATA[0-7]

AC4

CI_TS_SYN

AD5

CI_TS_VAL

AB4

CI_TS_CLK

AB19

BUF_TS_DATA[0]

AA20

BUF_TS_SYN

R156 AMP_RST

12507WS-08L

+3.3V 100 R1271 4.7K HD

XC5000_RESET /CI_CD1

R132

0 R1268 4.7K FHD

READY

4.7K

4.7K

3

READY

ST_AMP_MUTE

2

BUF_TS_VAL_ERR BUF_TS_CLK

AA19

ET_MDC

SC2_DET

B11

SC_RE2

A9

COMP_DET

SC_RE1

C9

R1267 R1283

100+3.3V 0

B10

R190

A10

R191

22 R1270 4.7K 0

C11

CI_EN 5V_HDMI_3 5V_HDMI_1

B9

5V Tolerance /FE_RESET

A11 SC1_DET

R1269 4.7K READY

D9 D10 D7 E11 E8 E10

1

AC19

GPIO44

+3.3V

H/W Version Opiton(F9)

SIDE_CVBS_DET

ET_COL

AC11

/CI_CD2

SC2_MUTE

P101

ET_TX_EN ET_MDIO

R136 0

+3.3V

C10

PWM3

+3.3V

E

BT_DM

100 0

IR

R1266 47K

PWM1

R1292 10K

EEPROM_SCL

B4

KEY2 LED_B

R1241 10K

22

R1300

R1257

SDA

4.7K

SCL

5

AA13

TS1_SYNC PWM0

A4 KEY1

SB_MUTE

READY

6

READY

R137

A2 3

1K

4.7K

WP

R198

R110 4.7K

100 READY

+3.3V

READY

7

4

S

VCC

A1 2

VSS

1uF C115

+3.3V

RTR030P02 Q104

8

AD12

KEY_BUZZER

D

10 : BOOT 51 11 : BOOT RISC

A0 1

AB12 R1287

IC107 CAT24WC08W-T

R1256 4.7K

PWM1

RL_ON/PWR_ONOFF

SDA1

TS0_CLK

+5V

100

DBG_RX

R187

AB17

GPIO43/PCM2_IRQA_N

UART_RX2

EEPROM_SCL

AB13

MODULE_ON DISP_EN R186

AC17

E7 LHSYNC2/I2S_OUT_MUTE/RX1

UART_TX2

PWM0

AC_DET

R134 27K

READY 100

H6

PF_ALE

TS0_D1

BLUETOOTH

LED_R

100 READY R195 10K READY R160 100

F6

/PF_WE

TS0_SYNC

MCU BOOT STRAP

AC_DET

/PF_OE

F8

22

100

GPIO131/LDE/SPI_WPn1

PCM_IOR/CI_RD

TS0_D7

+5V

R197 15K READY

R196 15K READY

TS0_D6

HDCP EEPROM

USB

USB_DP

PCM_A8/CI_A8

3.3K

7

R124

2

C116 100pF 50V

ISP_RXD ISP_TXD DBG_RX

VCC

R125

WP#

0.1uF C104

R104 10K

SO

SPI_DO

IC105 M24M01-HRMN6TP NC

22

R162 R163

PDP_SCL R133 4.7K

L101

READY

VCC

EEPROM_SDA PDP_SDA

READY

8

EEPROM_SCL +3.3V

R135 0

1

L102

R1233 4.7K

CS#

SPI_CS

EEPROM +3.3V +3.3V_ST

+3.3V

PCMD3/CI_D3

F_RBZ

22

IC103 MX25L4005AM2C-12G

TESTPIN/GND

PCMD2/CI_D2

AA14

PCM_RST /PCM_CD

PF_ALE

+3.3V

E6

PCMD1/CI_D1

PM GPIO Assignment Recommended by MStar

/PF_WE

Serial FLASH MEMORY for BOOT

C112

A3 18pF

PCMD0/CI_D0

PCM_A14/CI_A14

22

NC_19

25

V4

NC_22

NC_20

XIN XOUT

PCMD7/CI_D7

PCM_A[0]

PCM_A[10]

28

21

NC_13

NC_26

33

17

S6_Reset

PCM_A[0-7]

NC_27

34

16

/PF_CE1

10K

R103

45

5

15

CL

PF_WP

4

NC_28

B3

HWRESET

R1203 4.7K

RB

46

AC16

R1202 4.7K

R111

NC_6

47

R116 10

PCM_D[0]

R1279 4.7K

NC_5

2 3

D4

R114 100

READY

3.9K

1K R1240

/F_RB

NC_4

48

C102 4.7uF 10V

R1278 4.7K

NC_2 NC_3

1

C111 18pF

R193 1M

PCM_D[0-7]

R1205 4.7K

/PF_CE0 H : Serial Flash L : NAND Flash /PF_CE1 H : 16 bit L : 8 bit

+3.3V

NC_29

X100 12MHz

R1204 4.7K

NC_1

KDS181 D100

+3.3V

NAND FLASH MEMORY

IC100 LGE3369A (Saturn6 Non RM)

DEBUG

1

IC102 NAND512W3A2CN6E

SW100 TMUE312GAB

S6_Reset

D6 D5 C5

GPIO96 GPIO88 GPIO90/I2S_OUT_MUTE GPIO91 GPIO97 GPIO98 GPIO99 GPIO103/I2S_OUT_SD3 GPIO102

DSUB_DET

5

6

B/T_HP_LOUT_AMP

R1299

BT_DP

R1275

4

7

P_17V

8

470 R1290

L103

9

C113 0.1uF 50V

E ISA1530AC1 Q102

B C

C

E R1291 15K R1285 220

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

A7 Q107 2SC3052

B

R1289 750

GPIO67 C109 10uF 25V

16V 10uF C110

B/T_HP_LOUT

GPIO68

B8

R192 R155

100 100

R1293 10K

+3.3V

R1284 47K

USB_CTL

SC1_MUTE

B/T_HP_LOUT_AMP

MSD3368EV Platform FLASH/NVRAM/GPIO

09/09/24 1

10


+1.26V_VDDC

Audio Mute

C246 0.1uF

C240 470uF 16V

D202 ENKMC2838-T112 A1 A2

A2

C281 0.1uF

C2000 0.1uF

C2003 0.1uF

C2005 0.1uF

C2033 0.1uF

C2034 0.1uF

C2035 0.1uF

C2036 0.1uF

C2037 0.1uF

C2038 0.1uF

C2039 0.1uF

C2040 0.1uF

C2041 0.1uF

C266 0.1uF

C277 0.1uF

C283 0.1uF

C291 0.1uF

C296 0.1uF

SC1_MUTE

D201 ENKMC2838-T112 A1

+3.3V

+3.3V_VDDP

L210 MLB-201209-0120P-N2

SB_MUTE

C

AMP_MUTE

C275 0.1uF

SB_MUTE

C

SCART1_MUTE

C2032 0.1uF

SC2_MUTE

D203 ENKMC2838-T112 A1

C264 0.1uF

+1.26V_VDDC

SB_MUTE

C

SCART2_MUTE

C257 0.1uF

A2

ST_AMP_MUTE C250 0.1uF

C253 0.1uF

C258 0.1uF

C2026 0.1uF

C245 0.1uF

C248 0.1uF

C2004 0.1uF

+1.8V_DDR

C2010 220uF 6.3V


LVA0P

G2 RXA0P G3 RXA0N

LVA1P

H3 RXA1P G1 RXA1N

D1-_HDMI1

H1 RXA2P H2 RXA2N

D2+_HDMI1 D2-_HDMI1 DDC_SDA_1

A1 DDCD_A_DA B2 DDCD_A_CK

DDC_SCL_1

A2 HOTPLUG_A

1K

LVA1M LVA2P LVA2M LVA3P LVA3M LVA4P

RXE0-

AD15

RXE1+

AF16

RXE2+

AE15

RXE2-

AD13 AF14 AF13 AE13

C1 RXB0P C2 RXB0N D2 RXB1P D3 RXB1N E3 RXB2P D1 RXB2N

D2+_HDMI2

E1 DDCD_B_DA F3 DDCD_B_CK

DDC_SCL_2 R203

HPD2

E2 HOTPLUG_B

1K

AE8 CK+_HDMI3

AD8

CK-_HDMI3 D0+_HDMI3 D0-_HDMI3 D1+_HDMI3

D2-_HDMI3 DDC_SDA_3

SCART_RGB

1K

R204

100

SC1_ID SC1_FB SC1_R SC1_G SC1_B SC1_CVBS_IN

47

C200

0.047uF

R212

C201

R213

47 47

0.047uF 0.047uF

R214

470

1000pF

R215

47

C203 C204

R216

47 47

C205

0.047uF 0.047uF

R217 R243 10K

R244 10K

C202

C206

R246 R245

DSUB_VSYNC DSUB_R DSUB_G

R218

47

R219

47 47 470

R220

DSUB_B

R221

0.047uF

LVBCKM

RXC0N

C212 C207

22 22 0.047uF

C213

0.047uF 0.047uF

C208

1000pF

COMP

C214 C215 C216

0.047uF 0.047uF

R225

47 470

C209

1000pF

R238

100

R224

COMP_Pb SC2_ID

0.047uF

47 47

R223

COMP_Y

SIDE_CVBS_IN

TV/MNT

S-VID

CVBS

SC2_CVBS_IN

TUNER_CVBS

47

C210

0.047uF

R206

47

C211

0.047uF

R226

47

C217

0.047uF

R227

47

C218

0.047uF

R207

47

C219

0.047uF

47

C220

0.047uF

R235

47

C2024

0.047uF

R236

47

C2019

0.047uF

R228 R209

AF17

100 100

C221

0.047uF

C222

0.047uF

DTV/MNT_VOUT TP203

RXO1-

L14

RXO2+

L15

AE17

DDCD_C_DA DDCD_C_CK

P2 RIN0P/SC1_R R3 GIN0P/SC1_G

R2 GINM

K3 HSYNC1/DSUB_HSYNC K2 VSYNC1/DSUB_VSYNC

V1 RIN2P/COMP_PR+ V2 GIN2P/COMP_Y+ U1 BIN2P/COMP_PB+ V3 SOGIN2

U3 CVBS1/SC1_CVBS U2 CVBS2/SC2_CVBS T1 CVBS3/SIDE_CVBS T2 VCOM1

M1 CVBS4/S-VIDEO_Y M2 CVBS6/S-VIDEO_C N3 CVBS5 M3 CVBS7 W1 CVBS0/RF_CVBS Y3 VCOM0 Y2 CVBSOUT0/SC2_MNTOUT AA2 CVBSOUT1

GND_10 GND_11 GND_12

AD18

2.2uF

Y1

C230

2.2uF

AE1

C2006

2.2uF

AF3

C2007

AE3 AUR2 AUL2 AE2 AA1 AUR3 AB1 AUL3 AB2 AUR4 AC2 AUL4 AB3 AUR5 AC3 AUL5

C2008

2.2uF 2.2uF

AUL1

C2009 C2011

2.2uF 2.2uF

C2012

2.2uF

C2013

2.2uF

C2014

2.2uF

C2015

2.2uF

C2016

2.2uF

RXOCK+

M11

RXOCK-

M12

SC1_RIN

M16

SC1_LIN

M17

SIDE_LIN COMP_RIN COMP_LIN

N4 N9 N10 N11 N12 N13

PC_RIN

N14

PC_LIN N16 R241

0.1uF

R242

N17 47 47

TUNER_SIF

N18 P4

SIF0M

P9 SPDIF_IN

R282

E9

P10

0

R230

SPDIF_OUT

P14

AF1

AUOUTR1/SC1_ROUT AUOUTL1/SC1_LOUT AUOUTR2/SC2_ROUT

R239

100 BLUETOOTH 100

AD1

R240

100

AC1

R250

100

AD2

R251

100

AUOUTL2/SC2_LOUT

I2S_OUT_WS I2S_OUT_BCK I2S_OUT_SD

R231

22

B7

R232

22

C7

R233

22

D8

R234

22

C8

I2S_IN_SD

K4 REFP REFM

C223

C236 22pF READY C235 C233

J4 G4

AE5 AUVRM AUVRP AUVAG

0.1uF

0.1uF R229

390

C237 22pF READY

P16 P17 P18

T7

GND_18

VDDC_20

GND_19

VDDC_21

GND_20

VDDC_22

GND_21

VDDC_23

GND_22

VDDC_24

GND_23

VDDC_25

GND_24

VDDC_26

R9 R11

AUDIO_MASTER_CLK

R12

MS_LRCK

R13

MS_SCK MS_LRCH

R14 R15

C239 22pF READY

C224

0.1uF

AF4

C225

10uF

AD4

C226

0.1uF

C227

1uF 4.7uF

AE4

U20 U22 V7 V22 W11 W12 W19 W20 W22 Y22

+3.3V_VDDP

GND_25 GND_26

H9

GND_27

VDDP_1

GND_28

VDDP_2

GND_29

VDDP_3

GND_30

VDDP_4

GND_31

VDDP_5

GND_32

VDDP_6 VDDP_7

GND_33

H10 H11 H12 N20 P20 W9 W10

VDDP_8 +3.3V_AVDD L209 MLB-201209-0120P-N2


W7 AVDD_AU +1.8V_DDR

GND_37 GND_38

G12 AVDD_DDR_1 AVDD_DDR_3

GND_40

AVDD_DDR_4

GND_41

AVDD_DDR_5

GND_42

AVDD_DDR_6

GND_43

AVDD_DDR_7

GND_44

AVDD_DDR_8

GND_45

AVDD_DDR_9

GND_46

AVDD_DDR_10

GND_47

AVDD_DDR_11

GND_48

AVDD_MEMPLL_1

GND_49

AVDD_MEMPLL_2

GND_50

AVDD_MEMPLL_3

G13

R17 R18

H16 W14 W15 W16 W17

+3.3V

W18

L205 MLB-201209-0120P-N2

T20

C262

V20

T5 T9 T11 T12

T15 T16 T17 T18 U5 Y21 AA23

C273

C285

0.1uF

0.1uF +3.3V

GND_53

L207 MLB-201209-0120P-N2

R20 AVDD_LPLL

+3.3V_AVDD_MPLL C2030 H7

0.1uF

AVDD_MPLL

GND_58

C255

GND_59 0.1uF

GND_60

C2025 10uF 6.3V

C279

C288

0.1uF

0.1uF

C263 0.1uF

GND_61

+3.3V_AVDD

GND_62

L206 MLB-201209-0120P-N2

J7 AVDD_33_1

T13 T14

C269

0.1uF 0.1uF

GND_52

GND_57

0.1uF

H15

GND_51

GND_56

C293

0.1uF

H14

H17

GND_54

C284

H13

R16

W13

GND_64

AVDD_33_2

GND_65

AVDD_33_3

GND_66

AVDD_33_4

GND_67

AVDD_33_5

K7 L7

C241

M7

0.1uF 0.1uF

C286

C242

0.1uF

N7

+3.3V


L208

W8 AVDD_DM


Close to IC as close as possible

U7

VDDC_27

GND_55 C238 22pF READY

T22

GND_63

C228


R7

VDDC_15

R4 R10

T10 C234 0.1uF

1% Check AUCOM

SC2_Lout

0.1uF

H4

REXT

B/T_HP_LOUT

100

R279

+3.3V VCLAMP

P15 SC1_Rout SC1_Lout SC2_Rout

A8

P7

VDDC_14

AVDD_DDR_2

P13

R288

M20

VDDC_13

VDDC_19

SPDIF_OUT P12

AD3

L20

VDDC_12

VDDC_18

GND_39

PSU_ERR_DET

100

AF2

K20

VDDC_11

GND_17

P11

AUOUTR0/HP_ROUT

J20

VDDC_10

VDDC_17

SC2_LIN

0.1uF

H20

VDDC_9

GND_16

M9

SIDE_RIN

C232

H19

VDDC_8

VDDC_16

SC2_RIN

C231

H18

VDDC_7

GND_15

M18

W2

D20

VDDC_6

L18

M15

W3

D19

VDDC_5

RXO3-

N15

SIF0P

D18

VDDC_4

GND_13 GND_14

L1 RIN1P/DSUB_R L3 GIN1P/DSUB_G K1 BIN1P/DSUB_B L2 SOGIN1

GND_9

D17

VDDC_3

L17

R1 BIN0P/SC1_B P3 SOGIN0/SC1_CVBS P1 RINM T3 BINM

GND_7

D16

VDDC_2

RXO3+

M10

C229

AUR1

GND_6

RXO4-

AA3 AUL0

GND_5

VDDC_1

L16

M14 AUR0

GND_4

RXO2-

RXO4+

J5 VSYNC2

R205

R208

AF18

L13

RXC1P

I2S_OUT_MCK SC1_CVBS_IN

AD17

GND_3

L12

AUDIO OUT

COMP_Pr

AE19

GND_2

GND_8

M13

AUOUTL0/HP_LOUT R222

AF19

F11

DSUB_HSYNC

DSUB

RXC0P

N2 HSYNC0/SC1_ID N1 VSYNC0/SC1_FB

47

L11

RXO1+

AF20

AE18

AF8

HOTPLUG_C J3 CEC

R211

LVB4P

L10

RXCCKP

AD7

R210

LVB3M

L9

AUDIO IN

HDMI_CEC

R285

LVB3P

AD9

AF7

HPD3

LVB2M

LVBCKP

AE7

DDC_SCL_3

LVB2P

F7

RXO0-

AD19

LVB4M

AE9 RXC1N AE10 RXC2P AD10 RXC2N

D2+_HDMI3

LVB1M

RXCCKN

AF9

D1-_HDMI3

LVB1P

AD20

C2042 0.01uF

HDMI

D2-_HDMI2 DDC_SDA_2

LVB0M

E18

RXO0+

R255 22K

D1-_HDMI2

LVB0P

R254 22K

D0-_HDMI2 D1+_HDMI2

AE20

C2021 0.01uF

D0+_HDMI2

E17

RXE4+

RXECK-

LVACKM

R287 22K

CK-_HDMI2

E16

RXE3-

RXECK+

AD14

C2020 0.01uF

CK+_HDMI2

RXE3+

RXE4-

LVA4M LVACKP

IC100 +1.26V_VDDC LGE3369A (Saturn6 Non RM)

RXE1-

AF15

AE14 C3 RXBCKP B1 RXBCKN

C259 0.1uF

RXE0+

AD16

LVDS OUT

R258

HPD1

LVA0M

R257 22K

D0-_HDMI1 D1+_HDMI1

AE16

F1 RXACKP F2 RXACKN

R256 22K

D0+_HDMI1

C2023 0.01uF

CK-_HDMI1

C2022 0.01uF

CK+_HDMI1

C243 220uF 6.3V

H8 AVDD_USB

+3.3V MLB-201209-0120P-N2 C287 C292 L202 MLB-201209-0120P-N2 0.1uF 0.1uF C2044 C2043 10uF 2.2uF 6.3V 10V

C256

C272

0.1uF

0.1uF

MSD3368EV Platform AV IN_OUT/LVDS/POWER

2

10

AV IN_OUT/LVDS/POWER



DDR2 1.8V By CAP - Place these Caps near Memory +1.8V_S_DDR

+1.8V_DDR

C342

0.1uF

0.1uF

0.1uF C341

0.1uF C340

0.1uF C339

C337

0.1uF

0.1uF C338

0.1uF C334

0.1uF C336

0.1uF C332

10uF C330

0.1uF C331

0.1uF C328

0.1uF C329

0.1uF C327

0.1uF C326

C324

10uF C325

0.1uF

0.1uF

C320

0.1uF

C319

0.1uF

C318

0.1uF

C317

0.1uF

C316

10uF C315

0.1uF C314

0.1uF

C313

0.1uF

C312

0.1uF

C310

C308

0.1uF

0.1uF

C307

0.1uF

C306

0.1uF

C305

10uF

C304

C302 0.1uF

C323 0.1uF

C303

L300 MLB-201209-0120P-N2

+1.8V_S_DDR

H9

SDDR_D[6]

DQ6

F1

SDDR_D[7]

DQ7

F9

SDDR_D[8]

DQ8

C8 C2

DQ10

D7

SDDR_D[11]

DQ11

SDDR_D[12]

DQ12

D1

SDDR_D[13]

DQ13

D9

SDDR_D[14]

DQ14

B1

SDDR_D[15]

DQ15

D3

B9

A1

VDD4

E1

M7

A2

SDDR_A[2]

A3

SDDR_A[3]

N8

A4

N3

A5

SDDR_A[5]

N7

A6

SDDR_A[6]

P2

A7

SDDR_A[7]

P8

A8

SDDR_A[8]

P3

A9

SDDR_A[9]

SDDR_A[4]

M2

A10/AP

SDDR_A[10]

P7

A11

SDDR_A[11]

R2

A12

SDDR_A[12]

SDDR_A[6]

56 56 22

K8

CK

K2

CKE

56

SDDR_A[8]

SDDR_BA[1]

R1

ADDR2_A[4] ADDR2_A[6] R319 56

SDDR_A[11]

SDDR_BA[2] R351 0 READY SDDR_CK

VDD1

ADDR2_A[2]

SDDR_A[4]

BA2

CK

ADDR2_A[0]

SDDR_A[2]

BA1

J8

ADDR2_A[7] AR302

SDDR_A[0]

L1

M9

ADDR2_A[12]

SDDR_A[7]

L3

VDD2

ADDR2_A[9]

SDDR_A[12]

BA0

J9

/SDDR_CK

56

22

R320

J2

A0

M8

A1

M3

A2

M7

A3 A4

N2 N8

A5

N3

A6

N7

A7 A8

P2 P8

A9

P3 M2

A11

P7 R2

BA0

L2

BA1

L3

BA2

L1

G8

DQ0

G2

DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD5

E1

VDD4

J9

VDD3

J8

M9

VDD2

CK

K8

R1

VDD1

CKE

K2

A9

VDDQ10

C1

VDDQ9

CK

ODT

K9

CS

L8

RAS

C3

VDDQ8

CAS

L7

C7

VDDQ7

WE

K3

C9

VDDQ6

E9

VDDQ5

LDQS

G1

VDDQ4

F7

G3

VDDQ3

G7

VDDQ2

G9

VDDQ1

K7

UDQS

B7

LDM

F3

UDM

B3

HYNIX 1G

A3

VSS5

LDQS

E8

E3

VSS4

UDQS

A8

J3

VSS3

N1

VSS2

P9

VSS1

B2

VSSQ10

B8

VSSQ9

A7

VSSQ8

D2

VSSQ7

D8

VSSQ6

E7

VSSQ5

F2

VSSQ4

F8

VSSQ3

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

H2

VSSQ2

H8

VSSQ1

VREF

J2

A0

M8

A1 A2 A3 A4

M3 M7 N2 N8

A5

N3

A6

N7

A7 A8

P2 P8

A9

P3

A10

M2

A11 A12

BA0 BA1 BA2

P7 R2

G8

DQ0

G2

DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD_5

E1

VDD_4

L2 L3 L1

J9

VDD_3

J8

M9

VDD_2

CK

K8

R1

VDD_1

CKE

K2

CK

ODT CS RAS

K9 L8 K7

CAS

L7

WE

K3

LDQS

F7

UDQS

ELPIDA 1G

B7

A9

VDDQ_10

C1

VDDQ_9

C3

VDDQ_8

C7

VDDQ_7

C9

VDDQ_6

E9

VDDQ_5

G1

VDDQ_4

G3

VDDQ_3

G7

VDDQ_2

G9

VDDQ_1

LDM

F3

UDM

B3 A3

VSS_5

LDQS

E8

E3

VSS_4

A8

J3

VSS_3

N1

VSS_2

P9

VSS_1

B2

VSSQ_10

B8

VSSQ_9

UDQS

NC_5

R3

NC_6

R7

NC_1

A2

NC_2

E2

NC_3

R8

VSSDL

J7

A7 D2 D8

VDDL

J1

VSSQ_5

VSSQ_2

H8

VSSQ_1

ADDR2_A[8]

B12

ADDR2_A[9]

C23

ADDR2_A[12] A24

R304

ADDR2_BA[1]

B24

R305

ADDR2_BA[2]

D24

ADDR2_MCLK

B14

56 R308 SDDR_CKE READY +1.8V_S_DDR R346 4.7K

/ADDR2_MCLK

A14

ADDR2_CKE

D23

CS

K7

RAS

/SDDR_RAS

56

R310

/ADDR2_RAS

D13

/SDDR_CAS

56

R311

/ADDR2_CAS

D12

/SDDR_WE

56

R312

/ADDR2_WE

D22

C3

QIMONDA 1G

VDDQ7

C7

L7

CAS

VDDQ6

C9

K3

WE

VDDQ5

E9

VDDQ4

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

G9

LDQS

B7

UDQS

R309

SDDR_DQS0_P SDDR_DQS1_P

56 56

R313 R314

C18

B3

UDM

SDDR_DQM1_P

56

R316

ADDR2_DQM1_P

A19

SDDR_DQS0_N

56

R317

ADDR2_DQS0_N

A18

SDDR_DQS1_N

56

R318

ADDR2_DQS1_N

B17

A8

UDQS

VSS2

N1

VSSQ6 VSSQ5 VSSQ3

R3

NC4

R7

NC5

A2

NC1

E2

NC2

R8

NC3

ADDR2_D[11]

ADDR2_D[0]

B15

SDDR_D[12]

ADDR2_D[12]

ADDR2_D[1]

A21

ADDR2_D[9]

ADDR2_D[2]

A15

ADDR2_D[14]

ADDR2_D[3]

B21

ADDR2_D[4]

ADDR2_D[4]

C21

56 AR307

SDDR_D[4]

H2 H8

ADDR2_D[3]

SDDR_D[3]

ADDR2_D[1]

SDDR_D[1] 56

SDDR_D[6] J7

SDDR_D[15]

VSSDL +1.8V_S_DDR

AR308

ADDR2_D[8]

SDDR_D[8] SDDR_D[13]

J1

VDDL

ADDR2_D[6] ADDR2_D[15] ADDR2_D[10]

SDDR_D[10]

F8

VSSQ2

B_DDR2_A5

A_DDR2_A6

B_DDR2_A6

A_DDR2_A7

B_DDR2_A7

A_DDR2_A8 A_DDR2_A9

B_DDR2_A8 B_DDR2_A9

A_DDR2_A10

B_DDR2_A10

A_DDR2_A11

B_DDR2_A11

A_DDR2_A12

C335 1000pF

C333 0.1uF

A0

AF26

BDDR2_A[1]

BDDR2_A[1]

TDDR_A[1]

TDDR_A[1]

A1

T25

BDDR2_A[2]

AF23

BDDR2_A[3]

T24

BDDR2_A[4]

AE23

BDDR2_A[5]

R26

BDDR2_A[6]

AD22

BDDR2_A[7]

R25

BDDR2_A[8]

AC22

BDDR2_A[9]

AD23 BDDR2_A[10] R24

B_DDR2_BA0

A_DDR2_BA1

B_DDR2_BA1

A_DDR2_BA2

B_DDR2_BA2

BDDR2_A[5]

TDDR_A[5] TDDR_A[12]

BDDR2_A[12] 56

BDDR2_A[7]

TDDR_A[0] TDDR_A[2]

BDDR2_A[2]

TDDR_A[4]

BDDR2_A[4] 56

BDDR2_A[6]

BDDR2_A[11]

AE22 BDDR2_A[12]

TDDR_A[7]

AR305

BDDR2_A[0]

56

TDDR_A[11]

R326

56

TDDR_A[8]

BDDR2_A[8]

/A_DDR2_CAS

M7

A3

N2

TDDR_A[4]

A4

TDDR_A[5]

A5

N3

TDDR_A[6]

A6

N7

TDDR_A[7]

A7

P2

TDDR_A[8]

A8

P8

TDDR_A[9]

A9

P3

TDDR_A[10]

A10/AP

M2

TDDR_A[11]

A11

P7

TDDR_A[12]

A12

B_DDR2_DQS0

A_DDR2_DQS1

B_DDR2_DQS1

A_DDR2_DQM0

B_DDR2_DQM0

56 AR309

ADDR2_D[13] ADDR2_D[7]

SDDR_D[7]

ADDR2_D[0]

SDDR_D[0]

ADDR2_D[2]

SDDR_D[2]

ADDR2_D[5]

SDDR_D[5]

A_DDR2_DQSB0

BA0

L2

AC24

BDDR2_BA[1]

R328

56

TDDR_BA[1]

BA1

L3

BDDR2_MCLK

R330

22

CK

J8

CK CKE

AB23

/BDDR2_MCLK

R331

BDDR2_CKE

R332

BDDR2_ODT

R333

22 56 READY R348 56

U25

/BDDR2_RAS

R334

56

U24

/BDDR2_CAS

R335

56

/BDDR2_WE

R336

56

AB24

AB26

BDDR2_DQS0_P

AA26

BDDR2_DQS1_P

R337 R338

AC25

BDDR2_DQM0_P

R339

56

AC26

BDDR2_DQM1_P

R340

56

AB25

BDDR2_DQS0_N

R341

56

AA25

BDDR2_DQS1_N

R342

56

ADDR2_D[5]

C14

ADDR2_D[6]

C20

ADDR2_D[7] ADDR2_D[8] ADDR2_D[9]

C15 C16 C19

ADDR2_D[10] B16 ADDR2_D[11] B20 ADDR2_D[12] A20 ADDR2_D[13] A16 ADDR2_D[14] B19 ADDR2_D[15] A17

A_DDR2_DQ0

B_DDR2_DQSB1 B_DDR2_DQ0

4.7K READY R349

TDDR_ODT 4.7K

/TDDR_RAS /TDDR_CAS

A_DDR2_DQ1

B_DDR2_DQ1

A_DDR2_DQ2

B_DDR2_DQ2

A_DDR2_DQ3

B_DDR2_DQ3

A_DDR2_DQ4

B_DDR2_DQ4

A_DDR2_DQ5 A_DDR2_DQ6 A_DDR2_DQ7 A_DDR2_DQ8 A_DDR2_DQ9 A_DDR2_DQ10

B_DDR2_DQ5 B_DDR2_DQ6 B_DDR2_DQ7 B_DDR2_DQ8 B_DDR2_DQ9 B_DDR2_DQ10

A_DDR2_DQ11

B_DDR2_DQ11

A_DDR2_DQ12

B_DDR2_DQ12

A_DDR2_DQ13 A_DDR2_DQ14 A_DDR2_DQ15

B_DDR2_DQ13 B_DDR2_DQ14 B_DDR2_DQ15

BDDR2_D[11]

TDDR_D[11]

AE26

BDDR2_D[1]

BDDR2_D[12]

TDDR_D[12]

W24

BDDR2_D[2]

BDDR2_D[9]

AF24

BDDR2_D[3]

BDDR2_D[14]

AF25

BDDR2_D[4]

BDDR2_D[4]

V26 AE25 W26 Y26 AD25 Y25

DQ3

TDDR_D[3]

H1

DQ4

TDDR_D[4]

H9

DQ5

TDDR_D[5]

F1

DQ6

TDDR_D[6]

F9

DQ7

TDDR_D[7]

C8

DQ8

C2

DQ9

D7

DQ10

TDDR_D[10]

D3

DQ11

TDDR_D[11]

D1

DQ12

TDDR_D[12]

D9

DQ13

TDDR_D[13]

B1

DQ14

B9

DQ15

TDDR_D[8] TDDR_D[9]

TDDR_D[14] TDDR_D[15]

VDD5 VDD4

J9

VDD3

K8

M9

VDD2

K2

R1

VDD1

A9

VDDQ10

C1

VDDQ9

C3

VDDQ8

C7

VDDQ7

C9

VDDQ6

E9

VDDQ5

G1

VDDQ4

G3

VDDQ3

G7

VDDQ2

G9

VDDQ1

K9

CS

L8 K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

TDDR_DQS1_P

QIMONDA 512M

LDM

F3

UDM

B3

LDQS

E8

A3

VSS5

UDQS

A8

E3

VSS4

J3

VSS3

N1

VSS2

P9

VSS1

B2

VSSQ10

B8

VSSQ9

A7

VSSQ8

D2

VSSQ7

TDDR_DQM1_P

TDDR_DQS1_N L1

NC5

R3

NC6

R7

NC1

A2

TDDR_D[9]

IC301-*1 H5PS5162FFR-S6C

BDDR2_D[5] BDDR2_D[6] BDDR2_D[7] BDDR2_D[8] BDDR2_D[9] BDDR2_D[10]

AE24 BDDR2_D[11] AD26 BDDR2_D[12]

TDDR_D[14] AR311

56

BDDR2_D[3]

TDDR_D[4]

NC2

TDDR_D[3]

BDDR2_D[1]

NC3

TDDR_D[1] 56 AR312

BDDR2_D[6] BDDR2_D[15] BDDR2_D[8]

E2 R8

TDDR_D[6]

VREF

J2

A0

M8

A1

M3

A2

M7

A3 A4

N3 N7

A7 A8

P3 M2

BA1

AD24 BDDR2_D[14] AA24 BDDR2_D[15]

BDDR2_D[0]

L8 K7

CAS

L7

WE

K3

F7 B7

VSSQ6

VSSDL +1.8V_S_DDR

J7

E7

VSSQ5

F2

VSSQ4

F8

VSSQ3

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD5

E1

VDD4

J9

VDD3

M9

VDD2

R1

VDD1

A9

VDDQ10

C1 HYNIX 512M

VDDQ9

C3 C7 E9 G1 G3

LDM

F3

UDM

B3

G9

LDQS

E8

A3

UDQS

A8

E3

NC4

R3 R7

NC1

N1

L1

NC5 NC6

P9

B2

A2

NC2

E2

NC3

R8

H2

VSSQ2

H8

VSSQ1

VSSDL

J7

VDDL

J1

B8 A7 D2

TDDR_D[7]

VDDL

J1

VREF

J2

A0

M8

A4 A5 A6

M3 M7 N2 N8 N3 N7

A7

P2

A8

P8

A9 A10 A11

VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

VSS5 VSS4 VSS3 VSS2 VSS1

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ3

H2

VSSQ2

H8

VSSQ1

P3 M2 P7

A12

R2

BA0

L2

G8

DQ0

G2

DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD_5

BA1

L3

E1

VDD_4

CK

J8

J9

VDD_3

K8

M9

VDD_2

K2

R1

VDD_1

CK CKE

ODT

K9

CS

L8

RAS

K7 L7

A9 C1 ELPIDA 512M

C3 C7

K3

LDQS

F7

UDQS

B7

E9 G1 G3 G7

LDM

F3

UDM

B3

G9

LDQS

E8

A3

UDQS

A8

E3

NC_4

L1

J3

NC_5

R3

NC_6

R7

NC_1

A2

NC_2

E2

NC_3

R8

VSSDL

J7

N1 P9

B2 B8 A7 D2 D8

TDDR_D[5]

VDDQ7

VSSQ4

F8

C9

TDDR_D[2]

VDDQ8

E7 F2

IC301-*2 EDE5116AJBG-8E-E

A1

TDDR_D[0] 56

DQ1

H7

G7

WE

BDDR2_D[5]

DQ0

G2

C9 LDQS UDQS

CAS

BDDR2_D[2]

G8

K9

CS

A3

BDDR2_D[13]

L3

J8 K8 K2

ODT RAS

A2

56

P7 R2

L2

CK CKE

D8

TDDR_D[13] AR313

P2 P8

A9 A11 A12

BA0

CK

D8

TDDR_D[10]

BDDR2_D[13]

N2 N8

A5 A6

A10/AP

J3

TDDR_D[15] TDDR_D[8]

BDDR2_D[10]

BDDR2_D[7]

Y24

ODT

NC4

BDDR2_D[0]

TDDR_D[2]

H3

E1

RAS

/TDDR_WE

AR310

W25

TDDR_D[1]

DQ2

TDDR_CKE

56 56

TDDR_D[0]

DQ1

H7

A1

AB22 V25

DQ0

G2

+1.8V_S_DDR

TDDR_BA[0]

B_DDR2_DQM1

B_DDR2_DQSB0

R2

56

/B_DDR2_WE

A_DDR2_DQS0

N8

R327

B_DDR2_ODT

/B_DDR2_CAS

A2

TDDR_A[3]

BDDR2_BA[0]

B_DDR2_CKE

/B_DDR2_RAS

M3

AC23

U26

/A_DDR2_RAS

M8

TDDR_A[2]

TDDR_A[6]

BDDR2_A[11] R325

B_DDR2_MCLK

/B_DDR2_MCLK

TDDR_A[10]

AR304

V24 /A_DDR2_MCLK

56

BDDR2_A[10]

B_DDR2_A12

A_DDR2_BA0

A_DDR2_DQSB1

SDDR_D[11] SDDR_D[9]

F2

VSSQ1

A_DDR2_A5

A_DDR2_DQM1

AR306

D8 E7

B_DDR2_A4

TDDR_A[0]

TDDR_DQS0_N

SDDR_D[14]

D2

ADDR2_DQS1_P

C17

ADDR2_DQM0_P

J3

VSSQ7

B18

R315

VSS3

A7

ADDR2_DQS0_P

56

LDQS

VSSQ8

A_DDR2_A4

/A_DDR2_WE

SDDR_DQM0_P

E8

B8

B_DDR2_A3

A_DDR2_ODT

LDM

E3

B2

A_DDR2_A3

D14

ADDR2_ODT

F3

A3

VSSQ9

B_DDR2_A2

TDDR_A[3]

TDDR_DQM0_P

VSS4

VSSQ10

A_DDR2_A2

BDDR2_A[3]

TDDR_DQS0_P F7

VSS5

P9

B_DDR2_A1

BDDR2_A[0]

+1.8V_S_DDR

ODT

SDDR_ODT 56

B_DDR2_A0

A_DDR2_A1

A_DDR2_CKE

L8

READY 4.7K

A_DDR2_A0

A_DDR2_MCLK

K9

R347

1%

R345 1K ADDR2_A[7]

B23

R306

R307

R343 1K 1%

C311

C309

1000pF

C12

C1

VSSQ_6

VSSQ_3

H2

A23

ADDR2_A[6]

C24

VSSQ_7

VSSQ_4

F8

ADDR2_A[5]

ADDR2_BA[0]

VSSQ_8

E7 F2

ADDR2_A[4]

A13

A9

VSSQ4 IC300-*2 EDE1116AEBG-8E-F

ADDR2_A[8]

R303

IC300-*1 HY5PS1G1631CFP-S6

A12

C22

VDDQ9

VSS1

VREF

B13

ADDR2_A[3]

ADDR2_A[10] B22 ADDR2_A[11] A12

ADDR2_A[11]

56

ADDR2_A[2]

VDDQ10 VDDQ8

A10/AP

1K 1%

R321 AR301

L2

VDD3

56

56

SDDR_A[9]

SDDR_BA[0]

1% 0.1uF

R322

M3 N2

1K

1K 1% R302 1K 1%

A22

SDDR_A[10]

+1.8V_S_DDR VDD5

ADDR2_A[1]

SDDR_A[1]

ADDR2_D[0-15]

SDDR_D[10]

DQ9

ADDR2_A[10]

A1

T26

G8

TDDR_D[0-15]

DQ5

C13

SDDR_A[1]

TDDR_A[9]

TDDR_A[0-12]

SDDR_D[5]

ADDR2_A[0]

SDDR_A[0]

J2

AR303 BDDR2_A[9]

R344 150

H1

A_MVREF

ADDR2_A[1]

A0

VREF

D15

ADDR2_A[5] ADDR2_A[3]

M8

IC301 HYB18TC512160B2F-2.5

READY

DQ4

AR300

SDDR_A[5] SDDR_A[3]

BDDR2_A[0-12]

SDDR_D[4]

H3

VREF


BDDR2_D[0-15]

DQ3

+1.8V_S_DDR

ADDR2_A[0-12]

H7

SDDR_D[3]

SDDR_D[9]

J2

150 R300

G2

DQ2

READY

G8

DQ1

SDDR_D[2]

SDDR_A[0-12]

SDDR_D[0-15]

DQ0

SDDR_D[1]

C301

C300 1000pF

IC300 HYB18TC1G160C2F-2.5 SDDR_D[0]

0.1uF

R301

+1.8V_S_DDR

E7 F2

VDDL

J1

VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1

VSS_5 VSS_4 VSS_3 VSS_2 VSS_1

VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4

F8

VSSQ_3

H2

VSSQ_2

H8

VSSQ_1

56 IC300-*3 K4T1G164QE-HCE7 VREF

A0 A1 A2 A3 A4

J2

M8 M3 M7 N2 N8

A5

N3

A6

N7

A7 A8

P2 P8

A9

P3

A10/AP

M2

A11 A12

BA0 BA1 BA2

P7 R2

IC301-*3 K4T51163QG-HCE7

G8

DQ0

G2

DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD_5

E1

VDD_4

VREF

A0 A1 A2 A3 A4

L3 L1

M8 M3 M7 N2 N8

A5

N3

A6

N7

A7 A8

P2 P8

A9

P3

A10/AP

M2

A11 A12

BA0

L2

J2

BA1

P7 R2

G8

DQ0

G2

DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD_5

L2 L3

E1

VDD_4

J9

VDD_3

J8

J9

VDD_3

CK

J8

M9

VDD_2

CK

K8

M9

VDD_2

CK

K8

R1

VDD_1

CKE

K2

R1

VDD_1

A9

VDDQ_10

C1

CKE

CK

K2 ODT

ODT

K9

CS

K9

RAS

VDDQ_8

CAS

L7

L7

C7

VDDQ_7

WE

K3

WE

K3

C9

VDDQ_6

E9

VDDQ_5

G1

VDDQ_4

G3

VDDQ_3

G7

VDDQ_2

G9

VDDQ_1

CS

LDQS UDQS

L8 K7

F7 B7

LDM

F3

UDM

B3

LDQS UDQS

A3

VSS_5

E8

E3

VSS_4

A8

J3

VSS_3

N1

VSS_2

P9

VSS_1

NC_5

R3

NC_6

R7

NC_1

SS 1G

A2

NC_2

E2

NC_3

R8

VSSDL

J7

B2 B8 A7 D2 D8

VDDL

J1

LDQS UDQS

F7 B7

LDM

F3

UDM

B3

LDQS UDQS

VSSQ_3 VSSQ_2

H8

VSSQ_1


E9 G1 G3 G9

E8

A3 E3

R3 R7

A2

NC_2

E2

NC_3

R8

VSSDL

J7

VSSQ_6

H2

C7

A8

L1

NC_5 NC_6

NC_1

VSSQ_7

F8

C3

J3 NC_4

VSSQ_8

VSSQ_5

SS 512M

G7

VSSQ_9

VSSQ_4

C1

K7

C9

VSSQ_10

E7 F2

A9

L8

VDDQ_9

C3

CAS

RAS

N1 P9

B2 B8 A7 D2 D8

VDDL

J1

VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1

VSS_5 VSS_4 VSS_3 VSS_2 VSS_1

VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6

E7

VSSQ_5

F2

VSSQ_4

F8

VSSQ_3

H2

VSSQ_2

H8

VSSQ_1

MSD3368EV Platform DDR2

3

10

DDR2



DVB-CI SLOT +5V_CI_ON CI_DATA[0-7]

EAG41860102 P500

CI_MDI[7]

/CI_CD1 10067972-000LF

C501 0.1uF 16V

CI_DATA[4]

3 4

CI_DATA[5]

CI_TS_DATA[5]

39

5

CI_DATA[6]

CI_TS_DATA[6] CI_TS_DATA[7]

40

6

41

7

42

8

CI_MDI[3]

47

43

9

44

10

CI_ADDR[11]

CI_IOWR

45

11

CI_ADDR[9]

46

12

CI_ADDR[8]

CI_MDI[0]

47

13

CI_ADDR[13]

CI_MDI[1]

48

CI_MDI[2]

49

15

CI_MDI[3]

50

16

51

17

0.1uF

C503

100

R513 GND

READY

CI_MDI[4]

18

53

19

R514

GND

20 21

CI_ADDR[12]

CI_MDI[7]

56

22

CI_ADDR[7]

57

23

CI_ADDR[6]

58

24

CI_ADDR[5]

59

25

CI_ADDR[4]

60

26

CI_ADDR[3]

61

27

CI_ADDR[2]

62

28

CI_ADDR[1]

63

29

CI_ADDR[0]

64

30

CI_DATA[0]

65

31

CI_DATA[1]

66

32

CI_DATA[2]

67

33

68

34

47 AR503 33

CI_TS_CLK CI_TS_VAL CI_TS_SYN

CI_TS_DATA[0]

100

AR504 33 R510 +5V

100

G2 2

69

FE_TS_DATA[0] FE_TS_DATA[0-7]

GND

DVB-CI HOST I/F

/PCM_CD R530 0

CI_EN CI_ADDR[0-14]

IC501

1OE

1

TOSHIBA

G1 1

20

VCC

+3.3V_CI C511 0.1uF 16V

0ITO742440D 1A1

19

2

PCM_A[0]

2OE

AR514

GND

10K

R507

/CI_CD2

R512

R529

CI_TS_DATA[3]

READY

33

CI_TS_DATA[1] CI_TS_DATA[2]

FE_TS_DATA[1]

/PCM_IRQA

55

R500

FE_TS_DATA[2]

CI_MDI[1]

C509 0.1uF 16V

C508 0.1uF

54

47

FE_TS_DATA[3]

+5V

100

CI_MDI[6] 10K

AR507

CI_MDI[0]

0

READY

33

CI_MDI[2]

CI_WE

R516

CI_MDI[5]

R509

CI_OE

CI_ADDR[14]

14

52

/PCM_CE

CI_ADDR[10]

CI_IORD

REG

FE_TS_DATA[4]

10K

10K

CI_DATA[7] R515

R518

R508

/PCM_WAIT

FE_TS_DATA[5]

CI_DATA[3]

36 37

R503

FE_TS_DATA[6]

CI_MDI[5] CI_MDI[4]

38

PCM_RST

FE_TS_DATA[7]

R517 10K

100

33

CI_TS_DATA[4]

AR506

35 R511

AR500

33

CI_MDI[6]

FE_TS_DATA[0-7]

C505 10uF 6.3V R505 10K

DVB-CI TS INPUT

CI_DATA[0-7]

+5V

2Y4 CI_ADDR[7]

3

18

4

17

5

16

1Y1 CI_ADDR[0]

GND 1A2 PCM_A[1] R506 10K

2A4 PCM_A[7]

GND 2Y3

C502 0.1uF 16V

CI_ADDR[6]

TC74LCX244FT READY

1A3

6

PCM_A[2]

15

BUF_TS_SYN

1Y2 CI_ADDR[1] 2A3 PCM_A[6]

AR515 2Y2

BUF_TS_VAL_ERR

CI_ADDR[5]

7

14

8

13

9

12

10

11

1Y3 CI_ADDR[2]

BUF_TS_CLK 1A4 PCM_A[3] 2Y1 CI_ADDR[4] GND

2A2 PCM_A[5] 1Y4 CI_ADDR[3] 2A1 PCM_A[4]

DVB-CI SERIAL BUFFER TS +3.3V_CI

AR508

CI_DATA[0]

+3.3V_CI

3

10K

OUT_Y

16V 0.1uF

R520

4

C510

/CI_CD1

CI_EN

A0

FE_TS_CLK GND

R521 READY

R519

/PCM_CD 47

47

A1

FE_TS_VAL_ERR

A2

FE_TS_SYN

A3

FE_TS_SERIAL

CI POWER ENABLE CONTROL

R522 10K

A4

R523 10K

A5

+5V_CI_ON +5V_CI

Q501 RSR025P03 S

L500 MLB-201209-0120P-N2

D

C504 0.1uF 16V READY

C506 10uF 16V

C507 0.1uF 16V

33K R524

22K

R504

10K

R501

C500

A6 G

0.1uF 16V

1

20

2

19

3

18 17

4 5 6

16 15

7

14

8

13

VCC

PCM_D[2]

R527 AR509

CI_DATA[4]

B

Q500 2SC3052


PCM_D[4] PCM_D[5]

CI_DATA[6]

PCM_D[6]

CI_DATA[7]

PCM_D[7]

OE2

Y1 Y2 Y3

PCM_D[0-7]

CI_DATA[0-7]

Y0 AR513

33

BUF_TS_CLK BUF_TS_VAL_ERR BUF_TS_SYN

CI_ADDR[8]

BUF_TS_DATA[0]

CI_ADDR[9]

33

AR510 PCM_A[8] PCM_A[9]

CI_ADDR[10]

PCM_A[10]

CI_ADDR[11]

PCM_A[11]

Y4 Y5

CI_ADDR[12]

33

AR511 PCM_A[12]

CI_ADDR[13]

PCM_A[13]

A7

9

12

PCM_A[14]

Y6

10

11

Y7

33

REG AR512

E

PCM_D[3]

33

CI_DATA[5]

R528 C

33

CI_ADDR[14]

GND R502 10K

C512

GND

OE1

/CI_CD2

READY

2

VCC

R525 0

IN_A

5

BUFFER

1

0.1uF

74LVC541A(PW)

CI_DATA[3]

PCM_D[0] PCM_D[1]

CI_DATA[2]

PCM_D[0-7]

+3.3V_CI

IN_B

CI_DATA[0-7]

IC502

READY IC500 KIC7SZ32FU

PCM_5V_CTL

33

CI_DATA[1]

DVB-CI DETECT

CI_OE CI_WE

33

/PCM_REG

/PCM_OE /PCM_WE

CI_IORD

/PCM_IORD

CI_IOWR

/PCM_IOWR

MSD3368EV Platform CI

4

10

DVB-CI SLOT



5V_HDMI1

R612 0

20

+5V_ST 5V_HDMI1

IC600

EAG59023302

A0

A1

8 7 6 5 4 3 2 1

1

8

CK+

2

7

CK+_HDMI1 D0-

A2 D0-_HDMI1

REAR_H 3

6

4

5

R629

R626 18K

18K

SCL R623

GND

R662 10K

C603 0.1uF

WP

D0_GND D0+

5V_HDMI_3

VCC

CK-_HDMI1

12 11 10 REAR_H 9

R665 33K

C CEC_REMOTE

13

5V_HDMI_2

5V_HDMI_1

ENKMC2838-T112 D600

AT24C02BN-10SU-1.8

14

R663 33K

DDC_SCL_1

R660 10K

DDC_SDA_1

15

R661 33K

16

5V_HDMI3

5V_HDMI2

R664 10K

READY

5V_HDMI1

A1

17

C600 0.1uF 16V

A2

R600

18

1K READY

19

1K R615

HPD1

20

22

DDC_SCL_1

SDA

D0+_HDMI1

R621

22

DDC_SDA_1

D1D1-_HDMI1 D1_GND D1+ D1+_HDMI1 D2D2-_HDMI1 D2_GND D2+ D2+_HDMI1

UI_HW_PORT1

GND JK600

5V_HDMI2

R613 0

20

HPD2

R601

17

C601 0.1uF 16V

1K R616

18

1K READY

19

READY

20

5V_HDMI2 +5V_ST

16

DDC_SDA_2

15

DDC_SCL_2

7 6 5 4 3 2 1

CK+_HDMI2

1

8

2

7

A1 C

VCC C607 0.1uF

WP

D0-

R649

R646 18K

R632

18K

R637

330K D0-_HDMI2

A2

D0_GND

3

6

SCL DDC_SCL_2 R645

D0+

GND

D0+_HDMI2 D1-

4

5

22 R624 0 READY

SDA DDC_SDA_2 R642

D1-_HDMI2

22

D1_GND

D605 30V

READY

8

A1

CK+

MMBD301LT1G

EAG59023301

9

A0

CK-_HDMI2

12

+3.3V_HDMI_ST ENKMC2838-T112 D602

CEC_REMOTE

13

11 10

A2

IC602 AT24C02BN-10SU-1.8

14

R659 0

CEC_REMOTE

D1+

GND

S

D1+_HDMI2 D604 READY

D2D2-_HDMI2 D2_GND D2+ D2+_HDMI2

B

27K

HDMI_CEC

D

BSS83 Q600 READY

G

UI_HW_PORT2 JK601 GND

SIDE HDMI 5V_HDMI3

R636 0

17

ENKMC2838-T112 D603

16

DDC_SDA_3

15

DDC_SCL_3

IC603 AT24C02BN-10SU-1.8

A0

14

1

8

2

7

VCC

CEC_REMOTE

13

A1

CK-_HDMI3

SIDE_H 12 EAG42463001

A1

A2

C605 0.1uF 16V

5V_HDMI3 +5V_ST HPD3

C

R631

18

1K READY

19

READY

20

1K R638

JACK_GND

C608 0.1uF

WP

R648 18K

R650 18K

11 10 9 8 7 6 5 4 3 2 1

SIDE_H A2

CK+ CK+_HDMI3

3

6

SCL DDC_SCL_3 R643

D0GND

D0-_HDMI3

D0_GND

4

5

22

SDA DDC_SDA_3 R644

22

D0+ D0+_HDMI3

D1-

D1-_HDMI3

D1_GND

GND

D1+ D1+_HDMI3

D2-

D2-_HDMI3

D2_GND D2+

D2+_HDMI3

UI_HW_PORT3 GND JK603


MSD3368EV Platform HDMI

5

10

HDMI



Audio Amp AVSS

14

MCLK

15

OSC_RES

16

DVSS_1 VR_DIG PDN

20

SCLK

21

22K

2200pF

1uF C703

C721 330uF 25V

C775 330uF 25V

1

OUT_A

PVDD_A_1

2

3

BST_A

PVDD_A_2 4

GVDD_OUT_1

5

6

SSTIMER 7

NC

OC_ADJ 8

AVSS

24

PGND_AB_2

P_17V

47

PGND_AB_1

L705 2S AD-9060 2F

46

OUT_B

1S

45

PVDD_B_2

44

PVDD_B_1

43

BST_B

42

BST_C

1F

C732 0.01uF

R704 3.3

C740 0.68uF

T-AD_9060 50V 0.033uF

R705 3.3 C727 0.01uF

C726 0.1uF

DEV

SPK_L+

C725 0.01uF

C704 0.1uF

@netLa

41

PVDD_C_2

40

PVDD_C_1 OUT_C

38

PGND_CD_2

37

PGND_CD_1

SPK_L+ 50V 0.033uF C729

L704 2S AD-9060 2F 1S

1F

C717 0.1uF C739 0.68uF

T-AD_9060

C710 0.1uF

DEV

SPK_L-

R709 3.3 R719 3.3 C715 0.01uF

3

SPK_R+

2

SPK_R-

1 P700

@netLa

SPK_R-

OUT_D

PVDD_D_2

PVDD_D_1

BST_D

GVDD_OUT_2

VREG

GND

AGND

DVDD

DVSS_2

STEST

RESET

4

SPK_R+

C734 0.01uF

SDA1 SCL1

SPK_LWAFER-ANGLE

36

R708 22

0.1uF

10

23

35

SCL

34

SDA

R703 22

33

R706 22

0.1uF

39

22

32

MS_LRCK MS_SCK MS_LRCH

E

LRCLK

SDIN R711 READY 33K

Q701 2SC3052

10K

C722 4.7uF 10V

19

25

R716 B

C718 0.1uF

0

C AMP_MUTE

C712 1000pF 50V

R710

TAS5709PHPR IC701

31

1K R725 10K

+3.3V_DVDD C714

C735

C701

18

30

R712

AC_DET

120-ohm

L701

17

29

18K R714

11

9 TESTOUT

28

R713 200 1%

+3.3V_AVDD_AMP

P_17V

48

27

AVSS

L702

0.033uF 50V

13

26

C728 0.1uF

R702 22

+3.3V

PLL_FLTM

VR_ANA

PLL_FLTP 12

AVDD

AUDIO_MASTER_CLK

C733

120-ohm

+3.3V_AVDD_AMP

C723 10uF 16V

R715 470

470

C730

R718

R707

C736 0.047uF

Separate DGND AND AVSS

C713

AVSS

+3.3V 0.047uF

4700pF

C720

AVSS C702

4700pF

This parts are Located on AVSS area.

R717 0

P_17V C719 C706 0.1uF 0.1uF

1uF

C708

C709 1000pF

+3.3V_DVDD

C738

AMP_RST

0.033uF 50V

C737 0.1uF C707 0.1uF

C711 10uF 16V

TV_L/ROUT Audio Out Amp

TV_LOUT

R728 2K

Q706 RT1P141C-T112

TV_LOUT

TV_ROUT 5% 1/16W

R701

3

1 P_17V

C762 0.1uF

2

2K

R780 5.6K SC1_Lout

C774 0.1uF 50V

DTV/MNT_LOUT Q711 2SC3052

2K

2

13

3

12

R729 2K

14 R790 33K

13

12

5

33pF

C772

6

7

4

11

5

10

6

9

7

8

R787 5.6K SC2_Rout

R786 5.6K

10

SC2_Lout

R782 33K

9

8

DTV/MNT_ROUT

16V 10uF C778

11

C771

R726 2K

33pF

TV_ROUT

SCART2_MUTE

1/16W

14

33pF

R779 33K

C769

3

3

1

33pF

R781 5.6K

R727 2K

DTV/MNT_ROUT

Q710 2SC3052

C770

SC1_Rout

2K 1/16W 5%

5% R797

2

4

R798

RT1P141C-T112 Q709


C779 10uF 16V

SCART1_MUTE

Q704 2SC3052

1 R785 33K

R791 10K

1/16W 2K 5%

R789 10K

MUTE Ctrl

IC702 LM324D

R794

R783 10K

Q703 2SC3052

R784 10K

MNT/DTV OUT

DTV/MNT_LOUT

16V 10uF C777

C776 10uF 16V

1 2

C773 0.1uF

MSD3368EV Platform AUDIO

6

10

AUDIO



+5V

P800 SMAW200-H18S1

+5V +5V_ST

+5V_ST

P_+5V L817

C854 P_17V

L801 MLB-201209-0120P-N2

1 3

4

5

6

7

8

9

10

11

C817 100uF 25V READY

L800 C813 MLB-201209-0120P-N2 10uF

12

R801 100

RL_ON/PWR_ONOFF C805 0.1uF 16V

+5V_ST

R838 10K READY

13

14

15

16

17

18

R803 100

C818 0.1uF 50V

R856 10K READY

P_+5V

R835

L808 S1

1

8

D1_2

G1

2

7

D1_1

S2

3

6

D2_2

G2

4

5

D2_1

C864 10uF 16V

+5V_ST

C837 10uF 16V

R828 120K READY

C839 10uF 6.3V READY

C835 C834 100uF 0.1uF 16V AC_DET

C857 220uF 16V +5V_GENERAL

C866 0.1uF 16V

C858 220uF 16V +5V_CI

L818

560 C

B

C809 16V 0.1uF READY

L821 MLB-201209-0120P-N2

Q803 2SC3052

RL_ON/PWR_ONOFF

C865 0.1uF 16V

C862 10uF

Q806 SI4925BDY

R834 10K


C820 0.1uF 16V

C804 470uF 16V

PSU_ERR_DET

+5V_ST R837 2K

0.1uF

2

C833 10uF 16V

R829 10K E

C867 10uF 16V

C869 0.1uF 16V

C859 47uF 16V

C812 16V 0.1uF

19

MODULE_ON C807 0.1uF 16V

+3.3V_TU

L806 MLB-201209-0120P-N2 C826 0.1uF 16V

C885 0.1uF 16V

+5V GND

IC804 AZ1085S-3.3TR/E1

Stand-by +3.3V

+3.3V_CI MAX 3A INPUT

3

$0.122 1

2

OUTPUT

40 mA

L814 MLB-201209-0120P-N2

ADJ/GND

C852 0.1uF 16V

+3.3V_ST +5V_ST

+3.3V_AVDD_MPLL

+3.3V_ST

AP2121N-3.3TRE1 VIN

3

2

C829 10uF 16V

R858 0

R866 0

IC802

C831 0.1uF 650 mA

C815 0.1uF 16V

VOUT

GND

C803 0.1uF 16V

C806 10uF 16V

+3.3V

GND

0 R862

1 C802 10uF 16V

C828 68uF 10V

C808 0.1uF 16V


+3.3V_HDMI_ST

C850 10uF 6.3V

R859 0 C816 0.1uF 16V

C844 0.1uF

C897 220uF 16V

GND


GND

S6 core 1.26 volt

+3.3V_AVDD 320 mA +3.3V_AVDD

+5V

+3.3V_AVDD

+5V_GENERAL

50 mA

IC803

R865 0

IN

IC801 AP1117E33G-13 ADJ/GND

2 C842 100uF 16V

C800 10uF 16V

C888 10uF 6.3V

OUT

C801 0.1uF 16V

10uF

1

READY

3

1

ADJ/GND

L805

2 C814 0.1uF 16V

C810

IN

3

465 mA @85% efficiency

+1.8V_TU

AP1117E18G-13

C811 0.1uF 16V

OUT


C889 10uF 6.3V

C827 0.1uF 16V READY

C824 0.1uF 16V

P_+5V

C825 100uF 16V

C841 100uF 16V

450 mA

+1.8V_DDR

+1.8V_DDR

INPUT

3

2

OUTPUT

TP1451

FB

1

8

2

7

EN/SYNC

1600 mA L813 3.6uH

R2 GND

1%

R864 0

AZ1085S-ADJTR/E1

IC805 MP2212DN R1

1% R825 620K

IC800

SW_2

ADJ/GND

C883 0.1uF 16V

IN

Placed on SMD-TOP

R861 75

C893 10uF 6.3V


R802 0 1/4W

NR8040T3R6N 3

6

C877 0.1uF 16V

BS

4

5

C838 10uF

C OUT

SW_1 C843 10uF 6.3V

1 C878 10uF 6.3V

+1.26V_VDDC C899 READY 0.1uF 16V

10K

R824 360K

MAX 3A

10K

READY R827

R2 = R1/(Vout/0.8-1)

READY 50V 100pF C870 +3.3V

R831

Replaced Part

L802 MLB-201209-0120P-N2

VCC

C894 10uF 6.3V

C856 0.1uF

C830 10nF 50V

C898 10uF


1%

R860 33

1% R830 10 1%


C836 1uF 10V

MSD3368EV Platform POWER

7

10

POWER



+3.3V_AVDD

Full SCART 1

Half SCART 2

R918 10K

+3.3V_AVDD

D916 30V READY

C909 0.1uF 16V

SC1_DET

R919 1K

R949 10K C923 0.1uF 16V

SHIELD

SC1_CVBS_IN

SC2_CVBS_IN

D906 30V READY

D903 30V READY

R912 470K

16 RGB_IO 15 R_OUT 14 RGB_GND

19 SYNC_OUT

C907 100uF 16V

17 SYNC_GND1

SC1_FB

R914 22

16 RGB_IO

SC1_R D902 30V READY

R907 75

R904 75

13 R_GND

DEV

.

10

.

9

D901 30V READY

R903

R905 0

SC1_ID

GND

5

GND

4

R902 75

R911 10K

L_OUT 3

SC1_LIN

2

R901 470K

D908 5.6V

R_OUT 1

C901 OPT

JK900

C903 330pF 50V

.

10

.

9

READY

R928 75 D929 30V READY

C921 47uF 25V

R929 470K

Q904 2SC3052 R984 390 E

R987 0

E

.

7

L_IN

6

GND

5

GND

4

R900 470K

C900 OPT

E C

DTV/MNT_VOUT B

Q900 2SC3052

R966 1K

REC_8

E

D935 KDS184 A2 C A1

D930 30V READY

REC_8 SC2_ID

R946 62K

R947 11K

R941 10K SC2_LIN

R_IN 2

D928 5.6V

R_OUT 1

C902 330pF 50V

Q901 2SC3052

R967 1K

SC_RE2

C917 47uF 25V

C920 330pF 50V

C915 OPT

R927 470K

JK903

R943 12K

R940 10K

SC1_RIN D907 5.6V

B

SC_RE1

B

E

12K

C928 10uF 16V

C

Q902 2SC3052

R972

C

B

L_OUT 3

R910 12K

R906 10K

B

SC2_ID 8

R917 11K

TP1466

R_IN

R916 62K

D917 30V READY

SC1_B D915 30V READY

TP1467

6

READY

11 G_OUT

75

7

LIN

14 RGB_GND

12 D2B_OUT

SC1_G

SC_ID 8 B

Q905 2SC3052

DEV

E 2SA1504S Q903 R989 330 C

C

15 R_OUT

13 R_GND

12 D2B_OUT 11 G_OUT

C933 0.1uF 50V

18 SYNC_GND2

C B

R965 4.7K

47K R982

17 SYNC_GND1

R908 75

R968 10K

15K R985

FE_VOUT

19 SYNC_OUT 18 SYNC_GND2

20 SYNC_IN

C924 220pF 50V READY

R990 470

21 COM_GND

R945 0 C922 47pF 50V

R939 75

120 R988

GND

20 SYNC_IN

P_17V

D918 30V READY

READY

21 COM_GND

23 22 AV_DET

D904 30V READY

R969 3K

SHIELD


330 R981

R913 75 22 AV_DET

R915 0

C904 47pF 50V

L900 MLB-201209-0120P-N2

23

[SCART2 PIN 8]P_17V SC2_DET

R948 1K

SC2_RIN

R909 12K

D927 5.6V

C914 OPT

R926 470K

C919 330pF 50V

R942 12K

R996 1K TV_LOUT C932 6800pF 50V

D905 5.6V READY

R994 1K

DTV/MNT_LOUT

R980 470K READY

C931 6800pF 50V

D926 5.6V READY

R993 1K

R978 470K READY

TV_ROUT R995 1K

R976 470K READY

C929 6800pF 50V

DTV/MNT_ROUT C930 6800pF 50V

R979 470K READY

D920 5.6V READY

+3.3V_CI

USB FLG

C934 470uF 16V

JK901 PPJ234-01

5D

4

L901

R991 10K

IC902 NL17SZ08DFT2G

IN_1

5

IN_2

EN

READY

4

1

USB_CTL

2

AC_DET

3

0

1

R944

2

USB_OCD

R970

USB_DM

USB_DP D932 D933 CDS3C05HDMI1 CDS3C05HDMI1 5.6V 5.6V

4

C905 1000pF 50V

3

5

GND

5

[RD]O-SPRING_2

R960 12K

5E 4E L

R950 470K

[RD]E-LUG

D913

COMP_LIN 6E

R

DEV 6

3

KJA-UB-4-0004 JK905

12K

R961

R951 470K

R953 10K

2

100

USB DOWN STREAM

D914

COMP_RIN C906 1000pF 50V

1

7

C927

OUT_1

R954 10K

8

R992 10K

OUT_2

R999 10K

NC

SIDE CVBS

COMPONENT

P_+5V

IC900 AP2181SG-XX

0.1uF

D900 5.6V READY

[RD]CONTACT [WH]O-SPRING NON_20TOOL

Pr [RD]O-SPRING_1 5C

[RD]O-SPRING

5C

[RD]E-LUG

R973 1K

SIDE_CVBS_DET

SPDIF OPTIC JACK +5V_GENERAL +5V_GENERAL

SIDE_LIN

3

5

4

R964 1K READY

VCC

READY Y

JK904

R998 100

JST1223-001

READY R997 0

GND

VCC READY

D934 C926 0.1uF 50V

VINPUT

1

2

2

1

3

GND

SIDE_RIN 12K

C912 100pF

R931

470K

R922

COMP_DET

B

4

A

SPDIF_OUT R932

C913 100pF

IC901 NL17SZ00DFT2G

12K

JK902

470K

COMP_Y READY C910 4.7pF

R933 10K

R930 10K

R955 1K

SIDE_CVBS_IN C916 47pF 50V

C911 0.1uF 16V

R923

1%

4C

R963 10K

1%

R959 75 R956 75

[RD]CONTACT

R937 75

Fiber Optic

R952 10K

D910

[WH]O-SPRING

3C

D931 30V

PPJ235-01

GND

D909 30V

[YL]CONTACT

4B

COMP_Pb

R957 0

+3.3V_AVDD

3A

R938 0 +3.3V_AVDD

D919 30V

[GN]E-LUG

[YL]O-SPRING

D922

6A

[GN]O-SPRING

[YL]E-LUG

4A

D921

[GN]CONTACT

5A

1%

[BL]E-LUG-S

4A

R958 75

[BL]O-SPRING

7B

5A Y

D912

5B Pb

[RD]E-LUG-S

D911

7C

COMP_Pr

FIX_POLE



MSD3368EV Platform JACK

8

10


D1008

D1007

D1004

D1003

D1002

+5V_VGA NON_20TOOL

JK1001 SPG09-DB-010

R1018 22

C1001 0.1uF 16V

GND_2 RED GREEN_GND

12

GREEN BLUE_GND

8

R1016 10K

13

BLUE NC

9

V_SYNC

4

14

C1014 4.7pF R1019 1K

GND_1 SYNC_GND

10

DSUB_G

+3.3V_AVDD

H_SYNC

3

DDC_SDA/UART_TX

R1017 22

DDC_DATA

2

READY

15

D1009 30V

5

+5V_VGA +5V_ST

DSUB_DET

DDC_CLOCK DDC_GND

16

SHILED

C1013 0.1uF 16V

IC1001 AT24C02BN-10SU-1.8

R1015 22

NON_20TOOL

C1017 12pF

1

C1016 12pF

R1013 1K

ENKMC2838-T112 D1012

DSUB_B C1012 4.7pF

R1014 1K

A2

7

A1

11

C

1

DSUB_R C1015 4.7pF

RED_GND

6

8

R1024 4.7K

DSUB_HSYNC 2

7

3

6

4

5

100

DSUB_VSYNC

C1022 0.1uF

R1029 4.7K

R1023 R1032 0 DDC_SCL/UART_RX R1033 0 DDC_SDA/UART_TX C1018 18pF 50V

C1021 18pF 50V

ISP_RXD ISP_TXD

DDC_SCL/UART_RX R1010 75

R1007 75

R1005 75

GND

R1011 4.7K

R1012 4.7K

LVDS FFC WAFER PC AUDIO JK1000 PEJ027-01 NON_20TOOL 3

ROM DOWNLOAD FOR PDP

52 51 PC_SER_CLK

P401 SMAW200-H26S1

50

PC_SER_DATA

E_SPRING

6A

T_TERMINAL1

7A

B_TERMINAL1

4

PC_RIN D1010

R_SPRING

5.6V

49

PDP_SCL

5

48

C1020 100pF 50V

T_SPRING

R1028 10K R1022 470K

R1027 12K

DISP_EN 47

R1003 10 C1004 220pF 50V READY

1

44

MOD_ROM_TX

42

T_TERMINAL2

PC_LIN

3

4

5

6

C1019 100pF 50V

D1011 5.6V

MOD_ROM_RX

7

8

9

10

PDP_SDA

RXO0-

11

12

RXO0+

RXO1-

13

14

RXO1+

RXO2-

15

16

RXO2+

RXOCK-

17

18

RXOCK+

RXO3-

19

20

RXO3+

RXO4-

21

22

RXO4+

PC_SER_CLK

23

24

PC_SER_DATA

25

26

D1001

R1026 10K R1021 R1025 470K 12K

41

RXO1RXO1+ RXO2RXO2+

39

PDP_SCL

38 37 36 35 34

RXOCKRXOCK+

RS232C

33 32 31

+3.3V_ST

RXO3RXO3+ RXO4RXO4+

C1009 0.1uF 50V

RXE0+

1

RXE1RXE1+ RXE2-

$0.179

16

GND

+3.3V_ST

READY

RXECK+

27

R408 10K

PC_SER_CLK R1038 20TOOL 10

R1040 C1031 10pF 50V READY READY

R1008 100

PC_SER_DATA R1006 100

D1005

0


RXE3SUB_SCL

RXE3+

SUB_SDA

RXE4RXE4+

C1027 10pF READY

20 19

SUB_SDA

+3.3V

14 13

READY

7

50V

6

+3.3V

5 MOD_ROM_RX

JK1002 SPG09-DB-009

3

10

9

8

7

MOD_ROM_TX

4

2

8

9

10 C400 10uF 6.3V

+3.3V_ST

L400 MLB-201209-0120P-N2

11 C1025 10uF 6.3V

12 13

C1026 10pF READY

1 BUZZER 2

C B

Q1001 2SC3052 BUZZER

BUZZER E

5

4

1

R1036 22 KEY_BUZZER

BU400 PKM13EPY-4002-B0

100V BUZZER

8

50V

7

C408 10pF D1013 1N4148W_DIODES

D1006

6 R1035 22

L402 MLB-201209-0120P-N2

11

220pF

5

C404 10pF

C1028 10pF READY

+3.3V_ST

+5V

12

220pF

4

C405 10pF

R1034 C102922 10pF READY

16

C1006

C406 10pF

SUB_SCL

17

C1005

3

LED_R

21

LED_B

DBG_RX

6

C401 L401 10pF MLB-201209-0120P-N2

LVDS

22

9

2

3

10

DBG_TX

1

2

L404 MLB-201209-0120P-N2

KEY2

23

L408 NORMAL

C1011 0.1uF 50V R1039 0

R1004 4.7K

R409 10K

C402 L403 10pF MLB-201209-0120P-N2

24

15 R1037 20TOOL 10

R1002 D1015 4.7K 20TOOL

1

C407 10pF

C403 680pF

18 RXECK-

VCC

14 DOUT1

RIN1

ROUT1

15

RXE2+

13

12

11 DIN1

DIN2

27 @optio

L405 MLB-201209-0120P-N2

IR R402

0

KEY1

C1+

V+

C1-

2

3

C2+

C2-

4

DOUT2

V-

5

6

RIN2

7

8

10

9 ROUT2

R403 HD

25 RXE0-

IC1000

+3.3V_ST

28

R404 27K READY

26 C1010 0.1uF 50V

MAX3232CDR

100 DISP_EN

29

P402 12507WS-12L

READY

C1008 0.1uF 50V

C1007 0.1uF 50V

30

SUB Board I/F

R443 4.7K

RXO0+

40

READY

RXO0-

PC_SER_CLK

D1014 20TOOL

B_TERMINAL2

6B

45

43

D1000

2

R445 4.7K

C1000 C1002 270pF 220pF 50V 50V READY READY

46 R442 27K READY

L406 GLASS

R1001 10


PDP_SDA

PC_SER_DATA

7B

TF05-51S P403



MSD3368EV Platform RGB,RS232,LVDS

9

10


DVB-CI DETECT +3.3V_TU

+3.3V_TU

/FE_RESET IC1100 NL17SZ08DFT2G

C1141 0.1uF 16V

READY R1142 10

IN_B

FE_TS_VAL

IN_A

FE_TS_ERR

(TUNER RESET GPIO OPTION)

GND

TU_RESET

XC5000_RESET

1

5

VCC

C1101 0.1uF 16V

2

3

4

OUT_Y

10 R1127

GND

16V 0.1uF C1164

R1167

0

R1168

0

R1174

R1175

R1176

R1182

0

R1183

0

R1169

0

R1177

0

R1170

0

R1178

0

R1171

0

R1179

0

R1172

0

R1180

0

R1173

0

R1181

0

R1184

R1185

0

XI

SIF

43

CVBS

42

VDDAH_CVBS VSSAH_CVBS

MSTRT

5

47

MERR

6

R1126

47

VSSH_1

7

VDDH_1

IC1103 DRX3913K-XK

8

41

R1102

47

MCLK

9

40

INP

R1103 FE_TS_DATA[0] R1144

47

MVAL

10

39

INN

37

VDDAH_AFE1

13

36

VDDAL_AFE1

MD3

14

35

VSSAL_AFE1

VSSL_2

15

34

IF_AGC

VDDL_2

16

33

RF_AGC

R1107 6.8K

IF_AGC

32

C1181 0.027uF

RSTN

SAW_SW

GPIO2

VSSL_3

VDDL_3

VDDH_3

VSSH_3

VSSH_2

31

12

MD2

47

30

MD1

47

FE_TS_DATA[3] R1132

28

47

FE_TS_DATA[2] R1129

27

VSSAH_AFE1

26

38

25

11

17

MD0

C_+3.3V FE_TS_DATA[4] R1109

+5V

0

TUNER_IF_P TUNER_IF_N

47

FE_TS_DATA[1] R1148

IF_AGC

C1133 0.1uF 16V

C1172 1000pF 50V

47

R1121

0.1uF

C1160 1000pF 50V

XO

VSSAH_OSC

49

VDDAH_OSC

VDDH_4

VSSH_4

VSSL_4

VDDL_4

TDO

TMS

TCK

TDI

I2C_SDA2

I2C_SCL2

51 50

52

53

54

55

56

57

58

59

60

61

I2S_DA 64

44

R1115

C1176 0.1uF 16V

R1130 1K

0

VSSAL_AFE2

47

FE_TS_DATA[5] R1111 FE_TS_DATA[6] R1143

47

FE_TS_DATA[7] R1140

47

R1116 4.7K READY

47

R1108

0

/FE_RESET C1106 R1122 0.1uF 390 16V

0

100

Place the Buffer close to Tuner TUNER_SIF

R1136 100 50V 18pF C1113 READY

FE_TS_DATA[0-7] Q1103 ISA1530AC1

50V 18pF C1175 READY

R1139 4.7K READY

B C1161 6.8pF 50V

C

+5V SCL1

L1105 MLF1608A2R7J 2.7uH 5%

R1114 100

READY R1128 4.7K

E

R1135 680

C1102 0.1uF 16V

C_+3.3V

C1183 0.1uF 16V

R1159 390

SDA1

0

C1140

VDDAL_AFE2

45

24

24

23

22 GND_6

VDDD_1 0.1uF

C1119 0.1uF

To separate chassis ground R1166

FE_TS_CLK FE_TS_VAL

L1101 MLB-201209-0120P-N2

C1118

0.1uF

0.1uF C1182

C1124

0.1uF C1169

0.1uF C1129

C1116

0.1uF

+1.8V_TU

0.1uF

+1.8V_TU

TESTMODE

20

19

18

21 VDDA_6

VDDC_4

VDDC_3

+3.3V_TU

17

12

FE_TS_SYN FE_TS_ERR FE_TS_SERIAL

PDP

46

4

I2C_SDA1

25

DDI1

VDDC_2

C1173 18pF

C1151

47

3

GPIO1

23

VDDC_5

2

VSSL_1

I2C_SCL1

DDI2

26

VDDL_1

22

ADDRSEL

27

11

C1139 0.1uF

MD7

28

10

GND_4

PDN

21

9

VDDC_1

1K R1153

R1138 1K

VDDA_3

X1102 31.875MHz

C_+3.3V 48

20

C1148

X2

A_1.2V A_3.3V

1

MD6

RESET 37

GND_7

29

I2S_CL

VI2C 38

30

8

20.25MHz

I2S_WS

MD5

VDDC_6 39

X1

7

62

VREF_N 40

31

GND_3 VDDA_2

R1123 4.7K

6

C1131 C1152 18pF 18pF 50V 50V

0.1uF

63

VREF_P 41

XC5000

EXTCHOKE

C1121

SDA1 SCL1

19

VDDC_7 42

EXTREF

5

100

C1123 15pF 50V

X1101

18

VDDC_8 43

32

4

100

R1150

C1162 15pF 50V

MD4

REXT 44

33

VDDD_2

IC1104

IN2 GND_2

R1155 C1108 18pF

+1.2V

VDDH_2

TU_RESET

0.1uF

R1152

VDDA_7 45

0.1uF

4.99K

C1163 GND_9

1%

0.1uF

0.1uF

C1117 VDDC_9

C1156

1000pF C1115 VDDA_8

SCL

SIF

0.1uF

SDA

34

13

C1171

0.1uF 0.1uF

35

3

GND_5

C1158

2

VDDA_5

C1167

IN1 GND_1

16

L1114

C_+3.3V

GND_8

VIF

0.1uF

820nH 2% 1008CS-821XGLC

+3.3V_TU

36

15

C1109

+3.3V_TU

1

14

390nH 2%

6.8pF

270nH 2% C1146 120pF

+1.8V_TU

VDDA_1

VAGC

C2

L1108 0603CS-R27XGLW

A

READY

RCLAMP1521P D1102

RCLAMP0502B D1101 C1

6.8nH

L1116 0603CS-R39XGLW

56pF C1126

READY C1103 50V

C1120

1

C1134 1000pF

L1111 39pF0603CS-6N8XGLW2%

46

TUNER_SHIELD KCN-ET-5-0094 JK1101

47

0.1uF

VDDA_4

C1165

48

+3.3V_TU +1.8V_TU

D_3.3V

29

: ACTIVE LOW (SOFT RESET)

R1110 47 C1159 0.1uF

VSYNC

TUNER RESET

2

FE_TS_VAL_ERR

16V 0.1uF C1147

TUNER_IF_N

A_1.2V

+1.2V E

L1112 MLB-201209-0120P-N2

Q1108 ISA1530AC1 B

+3.3V_TU

C

+5V

[SCART1 TV VOUT]

C1105 10uF 6.3V

C1143 0.1uF 16V

C1142 0.1uF 16V

L1118

P_17V L1103 MLB-201209-0120P-N2

R1101 390

TUNER_CVBS

Q1101

+5V C

R1164 330 B C

B C1104 6.8pF 50V

16V 16V 0.1uF 0.1uF C1149 C1130

+3.3V_TU

C R1118 390

FE_VOUT

C1145 0.1uF 16V

IC1102 AZ1117H-1.2TRE1

IN

CVBS_SCART_OUT

READY

R1145 390 R1137 390

Q1102 ISA1530AC1

L1110 MLF1608A2R7J 2.7uH 5%

E

R1163 330

R1141 180

READY

16V 16V 16V 16V 0.1uF 0.1uF 0.1uF 0.1uF C1112 C1114 C1132 C1144

+1.2V

E

R1112 680

Q1110 2SC3052 READY

Q1105 2SC3052 E

R1151 15K

A_3.3V L1113 MLB-201209-0120P-N2

ISA1530AC1

CVBS_SCART_OUT

C1187 0.1uF 16V

+3.3V_TU

C

B

C1186 0.1uF 16V

E

B

R1133 47K C1170 47uF 16V

C1185 0.1uF 16V


C1168 0.1uF 16V

R1165 0

C1178 10uF 25V

L1117

C1138 0.1uF 50V

470 R1154

C1157 0.1uF 50V

C1136 C1174 0.1uF 0.1uF 16V 16V

ADJ/GND E Q1106 ISA1530AC1 B

C1188 100uF 16V

C1150 0.1uF 50V


+3.3V_TU C1122 100uF 16V

C_+3.3V

+3.3V_TU

L1107 MLB-201209-0120P-N2

OUT C1107 0.1uF 50V

C1177 0.1uF 16V

C1110 0.1uF 16V

D_3.3V

L1115 MLB-201209-0120P-N2 C1125 0.1uF 16V

C1179 0.1uF 16V

C1137 0.1uF 16V

C1153 0.1uF 16V

C Q1104

SC1_VIDEO_MUTE

C1166 0.1uF 16V

R1131 2K

3

1

+5V Q1107 2SC3052

2 R1157 390

C1184 0.1uF 16V

(SC1_TV_VOUT_MUTE GPIO OPTION)

TUNER_IF_P

E Q1109 ISA1530AC1 B C



MSD3368EV Platform TUNER

10

10
