Special Issue on Exploitation of Hardware Accelerators

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defining new trends in hardware accelerators, including hardware architecture, software tools, and applications. ... App
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Special Issue on Exploitation of Hardware Accelerators Microprocessors and Microsystems -- Embedded Hardware Design Guest Editors: Ramón Doallo, Margarita Amor, Basilio B. Fraguela (Universidade da Coruña, Spain)

The Elsevier Embedded Hardware Design (MICPRO) Journal seeks original manuscripts for a Special Issue on Exploitation of Hardware Accelerators scheduled to appear in the first half of 2011. The importance of hardware accelerators (GPUs, Cell, FPGAs, ...) is increasing rapidly, especially in the computationally demanding disciplines such as realistic 3D computer graphics and high-performance scientific computing. The use of these accelerators for General-Purpose computation achieves speedups of orders of magnitude vs. optimized CPU implementations. They have become powerful, capable, and inexpensive coprocessors useful for a wide variety of computation. This Special Issue is focused on issues related to experiences and knowledge in novel solutions exploiting and defining new trends in hardware accelerators, including hardware architecture, software tools, and applications. All authors who presented papers at WEHA 2010 are encouraged to submit an extended version of their paper to MICPRO for possible inclusion in this special issue. However, besides submissions based on WEHA 2010 papers, other high quality submissions within the scope of the special issue are also welcome. Each submission will be reviewed by at least three reviewers to ensure very high quality of selected papers for the special issue. AREAS OF INTEREST The topics of specific interest for this Special Issue include, but are not limited to the following: • • • • • • •

Languages and Compilers for Hardware Accelerators Libraries and Tools to Simplify the Programming of Hardware Accelerators Manual and Automatic Optimization Techniques Application Development Experience Benchmarking of Hardware Accelerators Modeling and Performance Prediction for Hardware Accelerators Novel Accelerator Architectures

SUBMISSION GUIDELINES The submitted papers must be written in English and describe original research which is neither published, nor currently under review by other journals or conferences. The author guidelines for preparation of manuscript can be found at http://www.elsevier.com/locate/micpro. A limit of 20 pages in the submission format will be enforced. All manuscripts and any supplementary material should be submitted through the Elsevier Editorial System (EES) at the following location http://ees.elsevier.com/micpro/. The authors must select " Special Issue: EHA" when they reach the "Article Type" step in the submission process. IMPORTANT DATES

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Submission deadline ------------------------------------------- September 10, 2010 Acceptance/Rejection Notification -------------------------- November 15, 2010 Final Version of the Paper ------------------------------------ February 15, 2011