The K computer: Project overview

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“K computer” is assigned for English documents. ✓ A logo was also ... First installation of the K computer. ✓The
The Next-Generation Supercomputer

The K computer: Project overview SHOJI, Fumiyoshi Next-Generation Supercomputer R&D Center, RIKEN

The “K computer” Outline Project Overview System Configuration of the “K computer” Facilities for the system

The “K computer” Outline Project Overview System Configuration of the “K computer” Facilities for the system

The “K computer” What is “K computer” ?  “京 (Kei)” is a nickname of the Next-Generation Supercomputer system.  The name was chosen from public applications this July.

 “京” is a Japanese prefix number like “mega, tera, peta, etc.”, which means 1016, or 10 peta. “万(man)=104”, “億(oku)=108”, “兆(cho)=1012”, “垓(gai)=1020 ”,・・・・  “K computer” is assigned for English documents.  A logo

was also determined.

It was written by a famous Japanese calligrapher Souun TAKEDA.

 Another meaning of the “京” is “a big gate.”  A new era of computational science is coming though the gate “京.” by hoping promised future success.

The “K computer” Goals of the Next-Generation Supercomputer project  Development and installation of the most advanced high performance supercomputer system with LINPACK performance of 10 petaflops.  Development and deployment of application software, which should be made to attain the system maximum capability, in various science and engineering fields.  Establishment of an “Advanced Institute for Computational Science:AICS” as one of the Center of Excellence around supercomputing facilities. →The AICS has been established in Kobe at October 2010.

The “K computer” Schedule of the project FY2006

Buildings

Applications

System

Next-Generation Integrated Nanoscience Simulation

Next-Generation Integrated Life Simulation

Computer building Research building

FY2007

Conceptual design

We are here. FY2008

FY2009

FY2010

FY2011

Prototype, Prototype, evaluation evaluation

Production, Production, installation, installation, and and adjustment adjustment

Development, Development, production, production, and and evaluation evaluation

Verification Verification

Detailed Detailed design design

Development, Development, production, production, and and evaluation evaluation

Design Design Design Design

Construction Construction Construction Construction

FY2012

Tuning Tuning and and improvement improvement

Verification Verification

First installation of the K computer The eight racks has been housed at October 1, 2010. First Linpack result by a part of the system  Rmax:48.03TFLOPS(Rpeak:52.22TFLOPS)

 Power:57.96kW

The “K computer” Outline Project Overview System Configuration of the “K computer” Facilities for the system

The “K computer” System configuration Users

System Configuration

Management Servers

Job & User Management

Networks for Control and Management

Control Servers

Compute Nodes

Number of CPUs > 80K Number of cores > 640K Total memory capacity > 1PB

Internet

Interconnect Network

Multi-dimensional Mesh/Torus

Local File System Global GlobalI/O I/ONetworks Networks

Global File System

Frontend Servers

The “K features computer” CPU (Fujitsu SPARC64TM VIIIfx)  8 cores

 2 SIMD operation units/core  2 Multiply & add floating-point operations (SP or DP) are executed in one SIMD instruction

 256 FP registers/core (double precision)

 Performance  16GFLOPS/core, 128GFLOPS/CPU  2.2GFLOPS/W (58W at 30℃ by water cooling)

 Hardware barrier among cores  Pre-fetch instruction

 Shared 6MB L2 Cache (12-way)  Software controllable cache (sectored cache) Reference: SPARC64TM VIIIfx Extensions http://img.jp.fujitsu.com/downloads/jp/jhpc/sparc64viiifx-extensions.pdf

45nm CMOS process, 2GHz 22.7mm x 22.6mm 760 M transistors

Compute nodes and Network Compute nodes (CPUs): > 80,000 Number of cores: > 640,000

Peak performance: > 10PFLOPS Memory: > 1PB (16GB/node) 5GB/s (peak) x 2

Compute node ノード

2

CPU: 128GFLOPS (8 Core) Core Core Core Core SIMD(4FMA) Core SIMD(4FMA) SIMD(4FMA) Core Core16GFlops SIMD(4FMA) SIMD(4FMA) Core 16GFlops 16GFlops SIMD(4FMA) SIMD(4FMA) 16GFlops 16GFlops SIMD(4FMA) 16GFlops 16GFlops 16GFLOPS

SPARC64TM VIIIfx 5GB/s(peak) x 2

) ak pe

x2

s( B/ 5G

L2$:6MB L2$: 5MB

64GB/s MEM: 16GB

y x

5GB/s (peak) x 2

z

B/ 5G

)x ak pe s(

6-dimensional mesh/torus network: Tofu 10 connections to each adjacent node Peak bandwidth: 5GB/s x 2 for each connection Logically 3-dimensional torus network

Courtesy of FUJITSU Ltd.

The “K computer” Packaging of the system  A rack consists of 24 system boards, 6 IO boards, power supply units, system storages, and diagnostic processors. 

A hose pipe is connected to the water loop under the floor.

796mm

システムボード System Board

CPU

LSI for interconnect

~460mm

2060mm

~560mm

ICC

The “K computer” Outline Project Overview System Configuration of the “K computer” Facilities for the system

AICS: location of the K computer in Kobe AICS (Advanced Institute for Computational Science) was established at RIKEN last July.

Kyoto Kobe

Tokyo 450km (280miles) west from Tokyo

Layout of the buildings

Computer building Research Building

Chillers

Substation Supply

Image of the K computer

More than 800 racks will be housed.

The full system will be in operational in 2012.

The “K computer” Summary  “The Next-Generation Supercomputer” → “京(kei)”,”K computer”  The facilities for the K computer is complete.  The installation of the K computer has started.

 The first measurement of LINPACK on a part of the system has been done.  The full system of the K computer will be in operational at 2012.

Thank you for your attention ! A photo in the early evening